LP2995M/NOPB National Semiconductor, LP2995M/NOPB Datasheet - Page 8

• Manufacturer Part Number: LP2995M/NOPB
• Description: IC REGULATOR DDR TERM 8-SOIC
• Manufacturer: National Semiconductor

Specifications of LP2995M/NOPB

• Applications: Converter, DDR
• Voltage - Input: 2.5 ~ 5.5 V
• Number Of Outputs: 1
• Operating Temperature: 0°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Primary Input Voltage: 2.5V
• No. Of Outputs: 1
• No. Of Pins: 8
• Output Current: 1.5A
• Operating Temperature Range: 0°C To +125°C
• Msl: MSL 1 - Unlimited
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Current Rating: 1.5A
• For Use With: LP2995M-EVAL - BOARD EVALUATION LP2995M
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Output: -
• Other names: *LP2995M; LP2995M

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Thermal Dissipation
Since the LP2995 is a linear regulator any current flow from
V
To prevent damaging the part from exceeding the maximum
allowable junction temperature, care should be taken to der-
ate the part dependent on the maximum expected ambient
temperature and power dissipation. The maximum allowable
internal temperature rise (T
maximum ambient temperature (T
the maximum allowable junction temperature (T
From this equation, the maximum power dissipation (P
of the part can be calculated:
The θ
the package used; the thickness of copper; the number of vias
and the airflow. For instance, the θ
with the package mounted to a standard 8x4 2-layer board
with 1oz. copper, no airflow, and 0.5W dissipation at room
temperature. This value can be reduced to 151.2°C/W by
changing to a 3x4 board with 2 oz. copper that is the JEDEC
standard.
the two boards mentioned.
Layout is also extremely critical to maximize the output cur-
rent with the LLP package. By simply placing vias under the
DAP the θ
LLP thermal data when placed on a 4-layer JEDEC board with
copper thickness of 0.5/1/1/0.5 oz. The number of vias, with
TT
will result in internal power dissipation generating heat.
JA
of the LP2995 will be dependent on several variables:
Figure 2
JA
can be lowered significantly.
FIGURE 2. θ
shows how the θ
T
P
Rmax
Dmax
= T
JA
= T
Rmax
Jmax
vs Airflow (SO-8)
Rmax
) can be calculated given the
− T
Amax
JA
/ θ
JA
Amax
of the SO-8 is 163°C/W
JA
) of the application and
varies with airflow for
Figure 3
Jmax
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shows the
).
Dmax
)
8
a pitch of 1.27 mm, has been increased to the maximum of 4
where a θ
for this calculation is 0.036 mm for 1oz. Copper.
FIGURE 3. LLP-16 θ
Additional improvements in lowering the θ
achieved with a constant airflow across the package. Main-
taining the same conditions as above and utilizing the 2x2 via
array,
FIGURE 4. θ
Figure 4
JA
of 50.41°C/W can be obtained. Via wall thickness
JA
shows how the θ
vs Airflow Speed (JEDEC Board with 4
JA
vs # of Vias (4 Layer JEDEC Board))
Vias)
JA
varies with airflow.
JA
can also be
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