LP2995M/NOPB National Semiconductor, LP2995M/NOPB Datasheet - Page 3

IC REGULATOR DDR TERM 8-SOIC

LP2995M/NOPB

Manufacturer Part Number
LP2995M/NOPB
Description
IC REGULATOR DDR TERM 8-SOIC
Manufacturer
National Semiconductor
Datasheet

Specifications of LP2995M/NOPB

Applications
Converter, DDR
Voltage - Input
2.5 ~ 5.5 V
Number Of Outputs
1
Operating Temperature
0°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Primary Input Voltage
2.5V
No. Of Outputs
1
No. Of Pins
8
Output Current
1.5A
Operating Temperature Range
0°C To +125°C
Msl
MSL 1 - Unlimited
Filter Terminals
SMD
Rohs Compliant
Yes
Current Rating
1.5A
For Use With
LP2995M-EVAL - BOARD EVALUATION LP2995M
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Output
-
Other names
*LP2995M
LP2995M
V
VOS
ΔV
Z
Z
I
q
VREF
VDDQ
REF
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Electrical Characteristics
apply over the full Operating Temperature Range (T
AVIN = PVIN = 2.5V, VDDQ = 2.5V
Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating range indicates conditions for which the device is
intended to be functional, but does not guarantee specific performance limits. For guaranteed specifications and test conditions see Electrical Characteristics.
The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under
the listed test conditions.
Note 2: VDDQ voltage must be less than 2 x (AVIN - 1) or 6V, whichever is smaller.
Note 3: V
Note 4: Load regulation is tested by using a 10ms current pulse and measuring V
Note 5: Quiescent current defined as the current flow into AVIN.
Note 6: At elevated temperatures, devices must be derated based on thermal resistance. The device in the SO-8 package must be derated at θ
junction to ambient with no heat sink. The device in the LLP-16 must be derated at θ
Note 7: Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality
Control (SQC) methods. The limits are used to calculate National's Average Outgoing Quality Level (AOQL).
Note 8: The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin.
AVIN to GND
PVIN to GND
VDDQ
Storage Temp. Range
Junction Temperature
PSOP-8 Thermal Resistance (θ
TT
VTT
/V
Symbol
TT
(Note
TT
offset is the voltage measurement defined as V
2)
V
V
Load Regulation
(Note
V
VDDQ Input Impedance
Quiescent Current
REF
TT
REF
Output Voltage Offset
Voltage
Output Impedance
4)
Parameter
JA
)
(Note
7).
−65°C to +150°C
Specifications with standard typeface are for T
-0.3V to AVIN
−0.3V to +6V
−0.3V to +6V
(Note
TT
I
I
(Note
I
I
I
I
(Note
REF_OUT
OUT
OUT
OUT
REF
OUT
subtracted from V
43°C/W
150°C
1)
J
= −5µA to +5µA
= 0A
= 0 to 1.5A
= 0 to −1.5A
= 0A
= 0°C to +125°C). Unless otherwise specified,
3)
5)
Conditions
= 0mA
3
REF
TT
.
.
JA
Operating Range
SO-8 Thermal Resistance (θ
LLP-16 Thermal Resistance (θ
Lead Temperature (Soldering, 10 sec)
ESD Rating
Junction Temp. Range
AVIN to GND
PVIN to GND
= 51° C/W junction to ambient.
(Note
1.21
Min
−15
−20
8)
J
(Note
= 25°C and limits in boldface type
1.235
−0.5
Typ
JA
100
250
0.5
6)
0
5
)
JA
)
Max
1.26
400
15
20
0°C to +125°C
2.2V to AVIN
2.2V to 5.5V
JA
www.national.com
= 151° C/W
151°C/W
51°C/W
260°C
Units
mV
kΩ
kΩ
µA
%
V
1kV

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