NCP1562ADR2G ON Semiconductor, NCP1562ADR2G Datasheet - Page 15

• Manufacturer Part Number: NCP1562ADR2G
• Description: IC CLAMP/RESET PWM CTLR 16-SOIC
• Manufacturer: ON Semiconductor

Specifications of NCP1562ADR2G

• Pwm Type: Voltage Mode
• Number Of Outputs: 2
• Frequency - Max: 1MHz
• Duty Cycle: 85%
• Voltage - Supply: 23.2 V ~ 100 V
• Buck: No
• Boost: Yes
• Flyback: Yes
• Inverting: Yes
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 16-SOIC (3.9mm Width)
• Frequency-max: 1MHz
• Topology: Flyback, Forward, Half-Bridge
• Output Voltage: 20 V
• Output Current: 2000 mA, 1000 mA
• Switching Frequency: 1000 KHz
• Duty Cycle (max): 85 %
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Fall Time: 10 ns
• Mounting Style: SMD/SMT
• Rise Time: 26 ns
• Synchronous Pin: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: NCP1562ADR2G; NCP1562ADR2GOSTR

designed for dc- - dc converters requiring high- - efficiency
and low parts count. These controllers incorporate two in
phase outputs with an adjustable overlap delay. The main
output is designed for driving a forward converter primary
MOSFET. The secondary output is designed for driving an
active clamp circuit MOSFET, a synchronous rectifier on
the secondary side, or an asymmetric half bridge circuit.
soft- - stop and a cycle skip overcurrent detector with a time
threshold. The soft- - stop powers down the converter in a
controlled manner after a fault is detected. The cycle skip
timer disables the converter if a continuous overcurrent
condition is present.
by incorporating high accuracy on critical specifications
such as programmable maximum duty cycle, undervoltage
detector and overcurrent threshold. Additional features
found in the NCP1562 include line feedforward,
bidirectional frequency synchronization up to 1.0 MHz,
cycle- - by- - cycle current limit with leading edge blanking
(LEB), independent under and overvoltage detectors,
internal startup circuit and soft- - start.
SOFT- -STOP AND SOFT- -START
soft- - start architecture that combines soft- - start and
soft- - stop functions on a single pin.
a fault is detected. By slowly reducing the duty cycle during
power down, the active clamp capacitor (C
discharged. This prevents oscillations between the power
transformer and C
in a predictable state.
up allowing the controller to gradually reach steady state
operation. Combined, both features reduce system stress
and power surges.
capacitor voltage (V
Soft- - start or soft- - stop is implemented by slowly charging
or discharging the capacitor on the SS pin. OUT1 is
disabled once the FF Ramp exceeds V
charge current is 10 mA and the soft- - stop discharge current
is 100 mA, guaranteeing a faster turn OFF time.
undervoltage, overvoltage, cycle skip or thermal shutdown
condition is detected. Once the converter enters the
soft- - stop mode, it will stay in soft- - stop mode until V
reaches 0.2 V even if the fault is removed prior to reaching
0.2 V.
placing an external resistor between the V
The resistor should be sized such that the total charge
The NCP1562x is a family of voltage mode controllers
Two distinctive features of the NCP1562 are the
The NCP1562 reduces component count and system size
The NCP1562 incorporates a novel soft- - stop and
Soft- - stop reduces the duty cycle until it reaches 0% once
Soft- - start slowly increases the duty cycle during power
The duty cycle is controlled by comparing the SS
The converter enters a soft- - stop sequence if an
The preset 1:10 charge:discharge ratio can be reduced by
clamp
SS
, and ensures the converter turns off
) to the Feedforward (FF) Ramp.
DETAILED OPERATING DESCRIPTION
SS
REF
. The soft- - start
and SS pins.
clamp
http://onsemi.com
) is
SS
15
current does not exceed 100 mA. Otherwise the converter
will not be able to complete a soft- - stop sequence.
is handled differently to ensure the fastest response time
and prevent system malfunction. If a soft- - stop sequence
starts before V
the FF Ramp (typ. 3.0 V) and the PWM Comparator (V
is not yet controlling the duty cycle, a controlled discharge
of C
However, if V
discharged until soft- - stop sets a duty cycle equal to the duty
cycle set by V
afterwards, as shown in Figure 35. If V
Ramp and the V
forced to the peak voltage of the FF Ramp, before starting
a controlled discharge of C
duty cycle set at the beginning of the soft- - stop event never
exceeds the duty cycle prior to the soft- - stop event.
Depending on the converter state, a soft- - stop sequence
SS
V
V
SS
V
commences immediately, as shown in Figure 34.
EA
Figure 35. Soft- -Stop Behavior when V
EA
Figure 34. Soft- -Stop Before Soft- -Start
V
is Complete and V
SS
(V
SS
EA
V
EA
EA
EA
X
Controls the Duty Cycle.
exceeds the maximum voltage clamp of
= V
. A controlled discharge commences
is not controlling the duty cycle)
is controlling the duty cycle, C
is not controlling the duty cycle, V
EA
- - V
FF Ramp
f
SS
, as shown in Figure 36. The
EA
is Open.
SS
exceeds the FF
EA
SS
SS
EA
is
is
)