ISL6742AAZA-T Intersil, ISL6742AAZA-T Datasheet

IC CTRLR PWM DBL ENDED 16-QSOP

ISL6742AAZA-T

Manufacturer Part Number
ISL6742AAZA-T
Description
IC CTRLR PWM DBL ENDED 16-QSOP
Manufacturer
Intersil
Datasheet

Specifications of ISL6742AAZA-T

Pwm Type
Voltage/Current Mode
Number Of Outputs
4
Frequency - Max
2MHz
Duty Cycle
100%
Voltage - Supply
9 V ~ 16 V
Buck
No
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
-40°C ~ 105°C
Package / Case
16-QSOP
Frequency-max
2MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ISL6742AAZA-TTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISL6742AAZA-T
Manufacturer:
Intersil
Quantity:
2 000
Part Number:
ISL6742AAZA-T
Manufacturer:
INTERSIL
Quantity:
20 000
Advanced Double-Ended PWM Controller
The ISL6742 is a high-performance double-ended PWM
controller with advanced synchronous rectifier control and
current limit features. It is suitable for both current- and
voltage-mode control methods.
The ISL6742 includes complemented PWM outputs for
synchronous rectifier (SR) control. The complemented
outputs may be dynamically advanced or delayed relative to
the main outputs using an external control voltage.
Its advanced current sensing circuitry employs sample and
hold methods to provide a precise average current signal.
Suitable for average current limiting, a technique which
virtually eliminates the current tail-out common to peak
current limiting methods, it is also applicable to current
sharing circuits and average current mode control.
This advanced BiCMOS design features an adjustable
oscillator frequency up to 2MHz, internal over-temperature
protection, precision deadtime control, and short propagation
delays. Additionally, Multi-Pulse Suppression ensures
alternating output pulses at low duty cycles where pulse
skipping may occur.
Ordering Information
PART NUMBER
ISL6742AAZA* ISL 6742AAZ
*Add “-T” suffix for tape and reel. Please refer to TB347 for details on
reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets, molding compounds/die attach materials,
and 100% matte tin plate plus anneal (e3 termination finish, which is
RoHS compliant and compatible with both SnPb and Pb-free soldering
operations). Intersil Pb-free products are MSL classified at Pb-free
peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J STD-020.
(Note)
MARKING
PART
®
TEMP. RANGE
1
-40 to +105
(°C)
Data Sheet
16 Ld QSOP M16.15A
PACKAGE
(Pb-free)
1-888-INTERSIL or 1-888-468-3774
DWG. #
PKG.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Features
• Synchronous Rectifier Control Outputs with Adjustable
• Adjustable Average Current Signal
• 3% Tolerance Cycle-by-Cycle Peak Current Limit
• Fast Current Sense to Output Delay
• Adjustable Oscillator Frequency Up to 2MHz
• Adjustable Deadtime Control
• Voltage- or Current-Mode Operation
• Separate RAMP and CS Inputs for Voltage Feed-Forward
• Tight Tolerance Error Amplifier Reference Over Line,
• 175µA Start-up Current
• Supply UVLO
• Adjustable Soft-Start
• 70ns Leading Edge Blanking
• Multi-Pulse Suppression
• Internal Over-Temperature Protection
• Pb-Free (RoHS Compliant)
Applications
• Half-Bridge, Full-Bridge, Interleaved Forward, and Push-Pull
• Telecom and Datacom Power
• Wireless Base Station Power
• File Server Power
• Industrial Power Systems
Pinout
Delay/Advance
or Current-Mode Applications
Load, and Temperature
Converters
October 31, 2008
All other trademarks mentioned are the property of their respective owners.
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
RAMP
VERR
VREF
Copyright Intersil Americas Inc. 2005, 2008. All Rights Reserved
IOUT
RTD
CS
CT
FB
1
2
3
4
5
6
7
8
(16 LD QSOP)
TOP VIEW
ISL6742
16
15
14
13
12
11
10
9
SS
VADJ
VDD
OUTA
OUTB
OUTAN
OUTBN
GND
ISL6742
FN9183.2

Related parts for ISL6742AAZA-T

ISL6742AAZA-T Summary of contents

Page 1

... PART TEMP. RANGE (Note) MARKING (°C) ISL6742AAZA* ISL 6742AAZ -40 to +105 *Add “-T” suffix for tape and reel. Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, ...

Page 2

Functional Block Diagram VDD VREF UVLO OVER- TEMPERATURE PROTECTION GND VREF 4X IOUT OSCILLATOR CT RTD SS PWM STEERING LOGIC SAMPLE + AND HOLD - 1.00V OVERCURRENT COMPARATOR PWM COMPARATOR VREF + - SOFT-START CONTROL VDD OUTA OUTB DELAY/ ADVANCE ...

Page 3

Typical Application - Telecom Primary Side Control Half-Bridge Converter with Synchronous Rectification VIN 36V TO 75V VIN VR1 C15 R13 Q4 T2 R17 Q2 C17 ...

Page 4

Typical Application - High Voltage Input Secondary Side Control Full-Bridge Converter VIN+ Q1 CR4 Q5A R13 Q5B C9 + 400 VDC C1 Q4 CR6 Q7A R12 Q7B C8 VIN- VREF T2 R21 Q15 CR1 CR2 SECONDARY ...

Page 5

... Thermal Resistance Junction to Ambient (Typical) 16 Lead QSOP (Note 1 0.3V REF Maximum Junction Temperature . . . . . . . . . . . . . . .-55°C to +150°C Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C Pb-Free Reflow Profile .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp = -40°C to +105°C, Typical values are TEST CONDITIONS VDD = 5. LOAD ...

Page 6

Electrical Specifications Recommended operating conditions unless otherwise noted. Refer to “Functional Block Diagram” on page 2, “Typical Application - Telecom Primary Side Control Half-Bridge Converter with Synchronous Rectification” on page 3 and “Typical Application - High Voltage Input Secondary Side ...

Page 7

Electrical Specifications Recommended operating conditions unless otherwise noted. Refer to “Functional Block Diagram” on page 2, “Typical Application - Telecom Primary Side Control Half-Bridge Converter with Synchronous Rectification” on page 3 and “Typical Application - High Voltage Input Secondary Side ...

Page 8

Typical Performance Curves 1.02 1.01 1.00 0.99 0.98 -40 -25 - TEMPERATURE (°C) FIGURE 1. REFERENCE VOLTAGE vs TEMPERATURE 4 1•10 3 1•10 100 RTD (kΩ) FIGURE 3. DEADTIME ...

Page 9

OUTAN and OUTBN - These outputs are the complements of OUTA and OUTB, respectively. These outputs are suitable for control of synchronous rectifiers. The phase relationship between each output and its complement is set by a control voltage applied to ...

Page 10

The maximum duty cycle, D, and percent deadtime, DT, can be calculated from --------- - – Soft-Start Operation The ISL6742 features a soft-start using an external capacitor in conjunction with ...

Page 11

The average current signal on IOUT remains accurate provided that the output inductor current is continuous (CCM operation). Once the inductor current becomes discontinuous (DCM operation), IOUT represents 1/2 the peak inductor current rather than the average current. This occurs ...

Page 12

Voltage feed-forward is often implemented in voltage-mode control loops, but is redundant and unnecessary in peak current-mode control loops. Voltage feed-forward operates by modulating the sawtooth ramp in direct proportion to the input voltage. Figure ...

Page 13

Synchronous Rectifier Outputs and Control The ISL6742 provides double-ended PWM outputs, OUTA and OUTB, and synchronous rectifier (SR) outputs, OUTAN and OUTBN. The SR outputs are the complements of the PWM outputs. It should be noted that complemented outputs are ...

Page 14

Slope Compensation Peak current-mode control requires slope compensation to improve noise immunity, particularly at lighter loads, and to prevent current loop instability, particularly for duty cycles greater than 50%. Slope compensation may be accomplished by summing an external ramp with ...

Page 15

If ΔV is greater than or equal to Ve, then no additional slope CS compensation is needed and R becomes Equation 22 --------------------------------------------------------------------------------------------------------------------------------- - CS ⎛ ⎛ ⎞ ⋅ ...

Page 16

Figure 15 illustrates a master-slave current sharing method. VOLTAGE ERROR AMPLIFIER INVERTING (-) INPUT BIAS ISL6742 14 3 VDD (>>R1) S& IOUT ...

Page 17

Fault Conditions A fault condition occurs if VREF or VDD fall below their undervoltage lockout (UVLO) thresholds or if the thermal protection is triggered. When a fault is detected, the soft-start capacitor is quickly discharged, and the outputs are disabled ...

Page 18

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

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