ISL6308ACRZ-T Intersil, ISL6308ACRZ-T Datasheet - Page 21

IC CTRLR PWM BUCK 3PHASE 40-QFN

ISL6308ACRZ-T

Manufacturer Part Number
ISL6308ACRZ-T
Description
IC CTRLR PWM BUCK 3PHASE 40-QFN
Manufacturer
Intersil
Datasheet

Specifications of ISL6308ACRZ-T

Pwm Type
Voltage Mode
Number Of Outputs
1
Frequency - Max
275kHz
Duty Cycle
66.6%
Voltage - Supply
4.75 V ~ 5.25 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
0°C ~ 70°C
Package / Case
40-VFQFN, 40-VFQFPN
Frequency-max
275kHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISL6308ACRZ-T
Manufacturer:
INTERSIL
Quantity:
20 000
initial load transient spike, as shown in Figure 18. Follow the
steps below to ensure the R-C and inductor L/DCR time
constants are matched accurately.
After choosing a new value for R
necessary to adjust the value of R
load droop voltage. Use Equation 26 to obtain the new value
for R
Compensation
The two opposing goals of compensating the voltage
regulator are stability and speed. Depending on whether the
regulator employs the optional load-line regulation, as
described in “Load-Line (Droop) Regulation” on page 13,
there are two distinct methods for achieving these goals.
Compensating the Load-Line Regulated Converter
The load-line regulated converter behaves in a similar
manner to a peak current mode controller because the two
poles at the output filter L-C resonant frequency split with the
introduction of current information into the control loop. The
final location of these poles is determined by the system
function, the gain of the current signal, and the value of the
compensation components, R
1. Capture a transient event with the oscilloscope set to
2. Record ΔV1 and ΔV2 as shown in Figure 18.
3. Select a new value, R
4. Replace R
about L/DCR/2 (sec/div). For example, with L = 1µH and
DCR = 1mΩ, set the oscilloscope to 500µs/div.
resistor based on the original value, R
Equation 27.
the error is corrected. Repeat the procedure if necessary.
R
S
FIGURE 18. TIME CONSTANT MISMATCH BEHAVIOR
COMP 2
.
ΔV
1
,
=
COMP
R
COMP 1
with the new value and check to see that
,
COMP,2
Δ
----------
Δ
V
V
21
1
2
2
and C
COMP
, for the time constant
S
to obtain the desired full
1
, it will most likely be
.
COMP,1
ΔV
ΔI
2
, using
V
I
TRAN
(EQ. 27)
OUT
ISL6308A
Since the system poles and zero are affected by the values
of the components that are meant to compensate them, the
solution to the system equation becomes fairly complicated.
Fortunately, there is a simple approximation that comes very
close to an optimal solution. Treating the system as though it
were a voltage-mode regulator, by compensating the L-C
poles and the ESR zero of the voltage mode approximation,
yields a solution that is always stable with very close to ideal
transient performance.
The feedback resistor, R
outlined in “Load Line Regulation Component Selection
(DCR Current Sensing)” on page 20. Select a target
bandwidth for the compensated system, F
bandwidth must be large enough to assure adequate
transient performance, but smaller than 1/3 of the per
channel switching frequency. The values of the
compensation components depend on the relationships of
F
frequency. For each of the following three, there is a
separate set of equations for the compensation components.
Case 1:
Case 2:
0
FIGURE 19. COMPENSATION CONFIGURATION FOR
to the L-C double pole frequency and the ESR zero
R
LOAD-LINE REGULATED ISL6308A CIRCUIT
R
C
---------------------------
1
R
C
---------------------------
2
1
2
1
=
=
1
=
=
L C
1
R
------------------------------------------------------------------------------- -
(
R
L C
R
------------------------------------------------ -
2π V
1
2
1
)
V
--------------------------------------------------------------- -
2
C
1
0.66 V
2π F
----------------------------------------------------------- -
OSC
2
>
F
, has already been chosen as
OSC
F
C
(OPTIONAL)
F
0
1
2
0
0
<
0.66 V
-------------------------------- -
2π C ESR
0.66 V
V
0
0.66 V
(
OSC
IN
R
V
1
)
COMP
OSC
VDIFF
2
1
IN
f
0
IN
FB
R
F
IN
2
0
1
L C
L C
0
L C
. The target
ISL6308A
September 9, 2008
(EQ. 28)
FN6669.0

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