HIP6004ECBZ-T Intersil, HIP6004ECBZ-T Datasheet - Page 9

• Manufacturer Part Number: HIP6004ECBZ-T
• Description: IC CTRLR PWM VOLTAGE MON 20-SOIC
• Manufacturer: Intersil

Specifications of HIP6004ECBZ-T

• Pwm Type: Voltage Mode
• Number Of Outputs: 1
• Frequency - Max: 1MHz
• Duty Cycle: 100%
• Voltage - Supply: 5 V ~ 12 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-SOIC (7.5mm Width)
• Frequency-max: 1MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The bulk filter capacitor values are generally determined by
the ESR (Effective Series Resistance) and voltage rating
requirements rather than actual capacitance requirements.
High frequency decoupling capacitors should be placed as
close to the power pins of the load as physically possible. Be
careful not to add inductance in the circuit board wiring that
could cancel the usefulness of these low inductance
components. Consult with the manufacturer of the load on
specific decoupling requirements.
Use only specialized low ESR capacitors intended for
switching-regulator applications for the bulk capacitors. The
bulk capacitor’s ESR will determine the output ripple voltage
and the initial voltage drop after a high slew-rate transient. An
aluminum electrolytic capacitor’s ESR value is related to the
case size with lower ESR available in larger case sizes.
However, the Equivalent Series Inductance (ESL) of these
capacitors increases with case size and can reduce the
usefulness of the capacitor to high slew-rate transient loading.
Unfortunately, ESL is not a specified parameter. Work with
your capacitor supplier and measure the capacitor’s
impedance with frequency to select a suitable component. In
most cases, multiple electrolytic capacitors of small case size
perform better than a single large-case capacitor.
Output Inductor Selection
The output inductor is selected to meet the output voltage
ripple requirements and minimize the converter’s response
time to the load transient. The inductor value determines the
converter’s ripple current and the ripple voltage is a function
of the ripple current. The ripple voltage and current are
approximated by the following equations:
Increasing the value of inductance reduces the ripple current
and voltage. However, the large inductance values reduce
the converter’s response time to a load transient.
One of the parameters limiting the converter’s response to a
load transient is the time required to change the inductor
current. Given a sufficiently fast control loop design, the
HIP6004E will provide either 0% or 100% duty cycle in
response to a load transient. The response time is the time
required to slew the inductor current from an initial current value
to the transient current level. During this interval the difference
between the inductor current and the transient current level
must be supplied by the output capacitor. Minimizing the
response time can minimize the output capacitance required.
The response time to a transient is different for the
application of load and the removal of load. The following
equations give the approximate response time interval for
application and removal of a transient load:
∆I =
t
RISE
=
V
IN
Fs x L
V
- V
L x I
IN
OUT
- V
TRAN
OUT
x
V
V
OUT
IN
t
FALL
9
∆V
OUT
=
L x I
= ∆I x ESR
V
OUT
TRAN
HIP6004E
where: I
response time to the application of load, and t
response time to the removal of load. With a +5V input
source, the worst-case response time can be either at the
application or removal of load and dependent upon the
DACOUT setting. Be sure to check both of these equations
at the minimum and maximum output levels for the worst
case response time. With a +12V input, and output voltage
level equal to DACOUT, t
Input Capacitor Selection
Use a mix of input bypass capacitors to control the voltage
overshoot across the MOSFETs. Use small ceramic
capacitors for high-frequency decoupling and bulk capacitors
to supply the current needed each time Q
small ceramic capacitors physically close to the MOSFETs
and between the drain of Q
The important parameters for the bulk input capacitor are the
voltage rating and the RMS current rating. For reliable
operation, select the bulk capacitor with voltage and current
ratings above the maximum input voltage and largest RMS
current required by the circuit. The capacitor voltage rating
should be at least 1.25 times greater than the maximum
input voltage and a voltage rating of 1.5 times is a
conservative guideline. The RMS current rating requirement
for the input capacitor of a buck regulator is approximately
1/2 the DC load current.
For a through-hole design, several electrolytic capacitors may
be needed. For surface mount designs, solid tantalum
capacitors can be used, but caution must be exercised with
regard to the capacitor surge current rating. These capacitors
must be capable of handling the surge current at power-up.
Some capacitor series available from reputable manufacturers
are surge current tested.
MOSFET Selection/Considerations
The HIP6004E requires 2 N-Channel power MOSFETs. These
should be selected based upon r
requirements, and thermal management requirements.
In high-current applications, the MOSFET power dissipation,
package selection and heatsink are the dominant design
factors. The power dissipation includes two loss components;
conduction loss and switching loss. The conduction losses are
the largest component of power dissipation for both the upper
and the lower MOSFETs. These losses are distributed between
the two MOSFETs according to duty factor (see the equations
below). Only the upper MOSFET has switching losses, since
the Schottky rectifier clamps the switching node before the
synchronous rectifier turns on. These equations assume linear
voltage current transitions and do not adequately model power
loss due the reverse recovery of the lower MOSFET’s body
diode. The gate-charge losses are dissipated by the HIP6004E
and don't heat the MOSFETs. However, large gate charge
increases the switching interval, t
MOSFET switching losses. Ensure that both MOSFETs are
TRAN
is the transient load current step, t
FALL
1
and the source of Q
is the longest response time.
DS(ON)
SW
which increases the upper
, gate supply
1
turns on. Place the
FALL
2
RISE
.
is the
is the