ISL6540AIRZ Intersil, ISL6540AIRZ Datasheet - Page 21

• Manufacturer Part Number: ISL6540AIRZ
• Description: IC CTRLR PWM BUCK 1PHASE 28-QFN
• Manufacturer: Intersil

Specifications of ISL6540AIRZ

• Pwm Type: Voltage Mode
• Number Of Outputs: 1
• Frequency - Max: 2MHz
• Duty Cycle: 100%
• Voltage - Supply: 2.97 V ~ 22 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Frequency-max: 2MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

components; conduction loss and switching loss. The
conduction losses are the largest component of power
dissipation for both the upper and the lower MOSFETs.
These losses are distributed between the two MOSFETs
according to duty factor (see the equations below). The
upper MOSFET exhibits turn-on and turn-off switching
losses as well as the reverse recover loss, while the
synchronous rectifier exhibits body-diode conduction losses
during the leading and trailing edge dead times.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
P
P
P
P
P
LOWER
DEAD
UPPER
SW
Qrr
=
=
=
Q
⎛
⎝
=
=
I
rr
O
⎛
⎝
⎛
⎝
⎛
⎝
•
I
I
+
I
O
O
VIN F
O
----- -
12
I Δ
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
+
2
2
+
+
----- -
12
⎞
⎠
I Δ
•
I Δ
------- -
•
I Δ
------- -
12
12
⎞
⎠
t
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
2
OFF
2
•
S
⎞
⎠
⎞
⎠
V
•
•
For information regarding Intersil Corporation and its products, see www.intersil.com
DT
r
--------------------------- -
r
-------------------------- -
+
DS ON
DS ON
•
⎛
⎝
I
(
N
N
t
(
O
DT
21
U
L
–
),U
----- -
12
+
),L
I Δ
⎛
⎝
⎞
⎠
I
•
•
O
•
D
(
1 D
–
t
ON
+
–
----- -
12
I Δ
P
⎞
⎠
SW
)
•
•
+
VIN F
V
P
+
DL
DEAD
P
•
Qrr
•
t
DL
S
(EQ. 22)
•
F
S
ISL6540A
where D is the duty cycle = V
recover charge; t
dead time, and t
These equations do not include the gate-charge losses that
are proportional to the total gate charge and the switching
frequency and partially dissipated by the internal gate
resistance of the MOSFETs. Ensure that both MOSFETs are
within their maximum junction temperature at high ambient
temperature by calculating the temperature rise according to
package thermal-resistance specifications. A separate
heatsink may be necessary depending upon MOSFET
power, package type, ambient temperature and air flow.
ON
DL
and t
and t
DT
OFF
are leading and trailing edge
O
are the switching intervals.
/VIN; Q
rr
is the reverse
October 7, 2008
FN6288.5