LM5026MT/NOPB National Semiconductor, LM5026MT/NOPB Datasheet - Page 14

• Manufacturer Part Number: LM5026MT/NOPB
• Description: CURRENT MODE-ACTIVE RESET
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of LM5026MT/NOPB

• Pwm Type: Current Mode
• Number Of Outputs: 2
• Frequency - Max: 1MHz
• Duty Cycle: 92.5%
• Voltage - Supply: 13 V ~ 100 V
• Buck: Yes
• Boost: Yes
• Flyback: Yes
• Inverting: Yes
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: Yes
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 16-TSSOP
• Frequency-max: 1MHz
• For Use With: LM5026EVAL - BOARD EVALUATION LM5026
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *LM5026MT; *LM5026MT/NOPB; LM5026MT

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Oscillator and Sync Capability
The LM5026 oscillator frequency is set by the external resis-
tance connected between the RT pin and ground (AGND). To
set a desired oscillator frequency (F) the necessary value of
total R
The R
and connected directly to the pins of the IC (RT and AGND).
The SYNC pin can be used to synchronize the internal oscil-
lator to an external clock. An open drain output is the recom-
mended interface between the external clock to the LM5026
SYNC pin as illustrated in
must be greater than 15 ns. The external clock frequency
must be a higher than the free running frequency set by the
R
T
resistance.
pin is used as an input, the driving source should be
current limited to less than 5 mA. For example, the
T
T
resistor(s) should be located very close to the device
resistance can be calculated from:
FIGURE 8. Sync from External Clock
Figure
8. The clock pulse width
FIGURE 7. Hiccup Over-Load Restart Timing
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Multiple LM5026 devices can be synchronized together sim-
ply by connecting the devices SYNC pins together as shown
in
tential differences between devices are minimized. In this
configuration all of the devices will be synchronized to the
highest frequency device. The internal block diagram of the
oscillator and synchronization circuit is shown in
The SYNC I/O pin is a CMOS buffer with pull-up current lim-
ited to 200 µA. If an external device forces the SYNC pin low
before the internal oscillator ramp completes its charging cy-
cle, the ramp will be reset and another cycle begins. If the
SYNC pins of multiple LM5026 devices are connected to-
gether, the first SYNC pin that pulls low will reset the oscillator
RAMP of all other devices. All controllers will operate in phase
when synchronized using the SYNC I/O feature. Up to five
LM5026 devices can be synchronized using this technique.
Figure
external trigger for a delayed restart sequence could
come an over-temperature protection circuit.
FIGURE 9. Sync from Multiple Devices
9. Care should be taken to ensure the ground po-
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Figure
10.