LM5026MT/NOPB National Semiconductor, LM5026MT/NOPB Datasheet - Page 13
![CURRENT MODE-ACTIVE RESET](/photos/6/60/66090/pkg_mtc16_sml.jpg)
LM5026MT/NOPB
Manufacturer Part Number
LM5026MT/NOPB
Description
CURRENT MODE-ACTIVE RESET
Manufacturer
National Semiconductor
Series
PowerWise®r
Datasheet
1.LM5026MTNOPB.pdf
(22 pages)
Specifications of LM5026MT/NOPB
Pwm Type
Current Mode
Number Of Outputs
2
Frequency - Max
1MHz
Duty Cycle
92.5%
Voltage - Supply
13 V ~ 100 V
Buck
Yes
Boost
Yes
Flyback
Yes
Inverting
Yes
Doubler
No
Divider
No
Cuk
No
Isolated
Yes
Operating Temperature
-40°C ~ 125°C
Package / Case
16-TSSOP
Frequency-max
1MHz
For Use With
LM5026EVAL - BOARD EVALUATION LM5026
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
*LM5026MT
*LM5026MT/NOPB
LM5026MT
*LM5026MT/NOPB
LM5026MT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LM5026MT/NOPB
Manufacturer:
TI
Quantity:
3 000
Soft-Start/Soft-Stop
The soft-start circuit allows the regulator to gradually reach a
steady state operating point, thereby reducing start-up stress-
es and current surges. Upon turn-on, the SS pin capacitor is
discharged by an internal switch. When the UVLO, VCC and
REF pins reach their operating thresholds, the SS capacitor
is released and charged with a 50uA current source. The
PWM comparator control voltage is clamped to the SS pin
voltage. When the PWM input reaches 1.4V, output pulses
commence with slowly increasing duty cycle. The voltage at
the SS pin eventually increases to 5V, while the voltage at the
PWM comparator increases to the value required for regula-
tion determined by the voltage feedback loop.
If the UVLO pin voltage falls below the 1.25V standby thresh-
old but above the 0.4V shutdown threshold, the 50uA SS pin
source current is disabled and a 50uA sink current discharges
the soft-start capacitor. As the SS voltage falls and clamps
the PWM comparator input, the PWM duty cycle will gradually
fall to zero. This soft-stop feature produces a gradual reduc-
tion of the power converter output voltage. This gradual dis-
charge of the output filter prevents oscillations in the self-
driven synchronous rectifiers on the secondary side of the
converter during turn-off.
Current Sense/Current Limit
The CS input provides a control ramp for the pulse width
modulator and current limit detection for overload protection.
If the sensed voltage at the CS comparator exceeds 0.5V the
present cycle is terminated (cycle-by-cycle current limit
mode).
A small RC filter, located near the controller, is recommended
for the CS input pin. An internal FET connected to the CS
input discharges the current sense filter capacitor at the con-
clusion of every cycle to improve dynamic performance. This
same FET remains on for an additional 100nS at the start of
each main switch cycle to attenuate the leading edge spike in
the current sense signal.
The CS comparator is very fast and may respond to short
duration noise pulses. Layout considerations are critical for
the current sense filter and sense resistor. The capacitor as-
sociated with the CS filter must be placed very close to the
device and connected directly to the pins of the LM5026 (CS
and AGND pins). If a current sense transformer is used, both
FIGURE 6. Maximum Duty Cycle vs UVLO Voltage
20147917
13
leads of the transformer secondary should be routed to the
filter network, which should be located close to the IC. If a
sense resistor located in the source of the main switch MOS-
FET is used for current sensing, a low inductance type of
resistor is required. When designing with a current sense re-
sistor, all of the noise sensitive low power ground connections
should be connected together near the AGND pin and a single
connection should be made to the power ground (sense re-
sistor ground point).
Overload Protection Timer
The LM5026 provides a current limit restart timer to disable
the outputs and force a delayed restart (hiccup mode) if a
current limit condition is repeatedly sensed. The number of
cycle-by-cycle current limit events required to trigger the
restart is programmable by means of an external capacitor at
the RES pin. During each PWM cycle the LM5026 either
sources or sinks current from the RES pin capacitor. If no
current limit is detected during a cycle, a 10uA discharge cur-
rent sink is enabled to hold the RES pin at ground. If a current
limit is detected, the 10uA sink current is disabled and a 10
uA current source causes the voltage at RES pin to gradually
increase. In the event of an extended overload condition, the
LM5026 protects the converter with cycle-by-cycle current
limiting while the voltage at RES pin increases. If the RES
voltage reaches the 2.5V threshold, the following restart se-
quence occurs (see Figure 7):
•
•
•
•
•
The overload timer function is very versatile and can be con-
figured for the following modes of protection:
1.
2.
3.
4.
The RES capacitor and SS capacitors are fully discharged.
The soft-start current source is reduced from 50 µA to 1
µA
The SS capacitor voltage slowly increases. When the SS
voltage reaches 1.4V, the PWM comparator will produce
the first output pulse. After the first pulse occurs, the SS
source current reverts to the normal 50 µA level. The SS
voltage increases at its normal rate gradually increasing
the duty cycle of the output drivers
If the overload condition persists after restart, cycle-by-
cycle current limiting will cause the voltage on the RES
capacitor to increase again, repeating the hiccup mode
sequence.
If the overload condition no longer exists after restart, the
RES pin will be held at ground by the 10 µA current sink
and normal operation resumes.
Cycle-by-cycle only: The hiccup mode can be
completely disabled by connecting the RES pin to AGND.
In this configuration, the cycle-by-cycle protection will
limit the output current indefinitely and no hiccup
sequences will occur.
Hiccup only: The timer can be configured for immediate
activation of a hiccup sequence upon detection of an
overload by leaving the RES pin open circuit.
Delayed Hiccup: The most common configuration as
previously described, is a programmed interval of cycle-
by-cycle limiting before initiating a hiccup mode restart.
The advantage of this configuration is short term
overload conditions will not cause a hiccup mode restart,
however during extended overload conditions the
average dissipation of the power converter will be very
low.
Externally Controlled Hiccup: The RES pin can also
be used as an input. By externally driving the pin to a level
greater than the 2.5V hiccup threshold, the controller will
be forced into the delayed restart sequence. If the RES
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