LTC1922EG-1#PBF Linear Technology, LTC1922EG-1#PBF Datasheet - Page 12

• Manufacturer Part Number: LTC1922EG-1#PBF
• Description: IC CTLR PWM SYNC 20SSOP
• Manufacturer: Linear Technology

Specifications of LTC1922EG-1#PBF

• Pwm Type: Voltage/Current Mode
• Number Of Outputs: 1
• Frequency - Max: 1MHz
• Duty Cycle: 99%
• Buck: No
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: Yes
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SSOP
• Frequency-max: 1MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -

OPERATIO
LTC1922-1
PDLY corresponding to several volts across the MOSFET,
the LTC1922-1 can “anticipate” a zero voltage VDS and
signal the external driver and switch to turn-on. The
amount of anticipation can be tailored for any application
by modifying the upper divider resistor(s). The LTC1922-1
DirectSense circuitry sources a trimmed current out of
PDLY and ADLY after a low to high level transition occurs.
This provides hysteresis and noise immunity for the PDLY
and ADLY circuitry, and sets the high to low threshold on
ADLY or PDLY to nearly the same level as the low to high
threshold, thereby making the upper and lower MOSFET
VDS switch points virtually identical, independent of V
Example: V
1. Set up SBUS: 1.5V is desired on SBUS with V
2. Set up ADLY and PDLY: 7V of “anticipation” are required
in this circuit to account for the delays of the external
MOSFET driver and gate drive components.
Zero Delay Mode
The LTC1922-1 provides the flexibility through the SBUS
pin to disable the DirectSense delay circuitry. See Figure 3
for details.
Powering the LTC1922-1
The LTC1922-1 utilizes an integrated V
to serve the dual purposes of limiting the voltage applied
12
Set divider current to 100 A.
R1 = 1.5V/100 A = 15k.
R2 = (48V – 1.5V)/100 A = 465k.
An optional small capacitor (0.001 F) can be added
across R1 to decouple noise from this input.
R3, R4 = 1k, sets a nominal 1.5mA in the divider
chain at the threshold.
R5, R6 = (48V – 7V – 1.5V)/1.5mA = 26.3k,
use (2) equal 13k segments.
IN
= 48V nominal (36V to 72V)
U
Figure 3. Zero Delays
SBUS
ADLY
PDLY
V
REF
1922 F03
CC
shunt regulator
IN
= 48V.
IN
.
to V
sufficient to begin switching operation (under voltage
lockout). With its typical 10.2V turn-on voltage and 4.2V
UVLO hysteresis, the LTC1922-1 is tolerant of loosely
regulated input sources such as an auxiliary transformer
winding. The V
of externally applied current. The UVLO turn-on and turn-
off thresholds are derived from an internally trimmed
reference making them extremely accurate. In addition,
the LTC1922-1 exhibits very low (145 A typ) start-up
current that allows the use of 1/8W to 1/4W trickle charge
start-up resistors.
The trickle charge resistor should be selected as follows:
Adding a small safety margin and choosing standard
values yields:
APPLICATION
DC/DC
Off-Line
PFC Preregulator
V
ceramic capacitor to decouple the fast transient currents
demanded by the output drivers and a bulk tantalum or
electrolytic capacitor to hold up the V
bootstrap winding, or an auxiliary regulator circuit takes
over.
Regulated bias supplies as low as 7V can be utilized to
provide bias to the LTC1922-1. Refer to Figure 4 for
various bias supply configurations.
CC
R
C
(minimum UVLO hysteresis)
CC
HOLDUP
START(MAX)
should be bypassed with a 0.1 F to 1 F multilayer
12V 10%
as well as signaling that the chip’s bias voltage is
V
CC
1.5k
= (I
CC
CC
Figure 4. Bias Configurations
= V
shunt is capable of sinking up to 25mA
1N5226
3V
+ I
0.1 F
IN(MIN)
DRIVE
85V to 270V
V
36V to 72V
) • t
– 10.7V/250 A
V
IN
390V
BIAS
RANGE
V
DELAY
< V
CC
DC
1N914
UVLO
RMS
V
/3.8V
IN
CC
R
START
0.1 F
supply before the
+
R
1.4M
100k
430k
C
START
1922 F04
HOLD