ADT7460ARQZ ON Semiconductor, ADT7460ARQZ Datasheet - Page 21
![no-image](/images/manufacturer_photos/0/4/495/on_semiconductor_sml.jpg)
ADT7460ARQZ
Manufacturer Part Number
ADT7460ARQZ
Description
IC REMOTE THRML/FAN CTRLR 16QSOP
Manufacturer
ON Semiconductor
Series
dBCool®r
Specifications of ADT7460ARQZ
Function
Fan Control, Temp Monitor
Topology
ADC, Comparator, Multiplexer, Register Bank
Sensor Type
External & Internal
Sensing Temperature
-40°C ~ 120°C, External Sensor
Output Type
SMBus™
Output Alarm
No
Output Fan
Yes
Voltage - Supply
3 V ~ 5.5 V
Operating Temperature
-40°C ~ 120°C
Mounting Type
Surface Mount
Package / Case
16-QSOP
Full Temp Accuracy
+/- 3 C
Digital Output - Bus Interface
Serial (3-Wire)
Maximum Operating Temperature
+ 120 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADT7460ARQZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Company:
Part Number:
ADT7460ARQZ-REEL
Manufacturer:
ST
Quantity:
16
Enabling the SMBALERT Interrupt Output
default. Pin 5 or Pin 14 can be reconfigured as an
SMBALERT output to signal out−of−limit conditions.
To Assign THERM Functionality to Pin 9
ADT7460. To configure Pin 9 as the THERM pin, set the
THERM ENABLE Bit (Bit 1) in Configuration Register 3
(Address 0x78) = 1.
THERM as an Input
user to time assertions on the pin. This can be useful for
connecting to the PROCHOT output of a CPU to gauge
system performance. For more information on timing
THERM assertions and generating SMBALERTs based on
THERM, see the Generating Interrupts from Events sections.
THERM pin is driven low externally, the fans run at 100%.
The fans run at 100% while the THERM pin is pulled low.
Configuration Register 3 (Address 0x78) to 1. This works
only if the fan is already running, for example, in manual
mode when the current duty cycle is above 0x00 or in
automatic mode when the temperature is above T
temperature is below T
mode is set to 0x00, pulling THERM low externally has no
effect. See Figure 36 for more information.
THERM ASSERTED TO LOW AS
AN INPUT. FANS DO NOT GO
TO 100% SINCE TEMPERATURE
IS BELOW T
Table 24. Configuration Register 4 (Reg. 0x7D)
Table 25. Configuration Register 3 (Reg. 0x78)
T
THERM
The SMBALERT interrupt function is disabled by
Pin 9 can be configured as the THERM pin on the
When configured as an input, the THERM pin allows the
The user can also set up the ADT7460 so when the
This is done by setting the BOOST bit (Bit 2) in
MIN
Pin No.
Pin No.
Figure 36. Asserting THERM Low as an Input in
14
5
MIN
Automatic Fan Speed Control Mode
.
<0> AL2.5V = 1
<0> ALERT = 1
MIN
or if the duty cycle in manual
THERM ASSERTED TO LOW AS AN
INPUT. FANS GO TO 100% SINCE
TEMPERATURE IS ABOVE T
Bit Setting
Bit Setting
MIN
MIN
http://onsemi.com
. If the
ADT7460
21
THERM Timer
assertion time. For example, the THERM input may be
connected to the PROCHOT output of a Pentium 4 CPU and
measure system performance. The THERM input may also
be connected to the output of a trip point temperature sensor.
THERM input and stopped on the negation of the pin. The
timer counts THERM times cumulatively, therefore, the
timer resumes counting on the next THERM assertion. The
THERM timer continues to accumulate THERM assertion
times until the timer is read (it is cleared on read) or until it
reaches full scale. If the counter reaches full scale, it stops
at that reading until cleared.
such that Bit 0 is set to 1 on the first THERM assertion. Once
the cumulative THERM assertion time exceeds 45.52 ms,
Bit 1 of the THERM timer is set and Bit 0 becomes the LSB
of the timer with a resolution of 22.76 ms.
THERM input is asserted and negated. Bit 0 is set on the first
THERM assertion detected. This bit remains set until the
cumulative THERM assertions exceed 45.52 ms. At this
time, Bit 1 of the THERM timer is set, and Bit 0 is cleared.
Bit 0 now reflects timer readings with a resolution of
22.76 ms.
After a THERM timer read (Reg. 0x79)
The ADT7460 has an internal timer to measure THERM
The timer is started on the assertion of the ADT7460’s
The 8−bit THERM timer register (Reg. 0x79) is designed
Figure 37 illustrates how the THERM timer behaves as the
When using the THERM timer, be aware of the following:
♦
♦
cleared (assuming the THERM limit has been
exceeded).
Figure 37. Understanding the THERM Timer
The contents of the timer is cleared on read.
The F4P bit (Bit 5) of Status Register 2 needs to be
(REG. 0x79)
(REG. 0x79)
(REG. 0x79)
THERM
THERM
THERM
THERM
THERM
THERM
TIMER
TIMER
TIMER
ACCUMULATE THERM LOW
ACCUMULATE THERM LOW
ASSERTION TIMES
ASSERTION TIMES
0 0 0
7 6 5
0 0 0
7 6 5
0 0 0
7 6 5
0
4
0
4
0
4
0 0 0 1
3 2 1 0
0 0 1 0
3 2 1 0
0 1 0 1
3 2 1 0
THERM ASSERTED
(91.04ms + 22.76ms)
THERM ASSERTED
THERM ASSERTED
3
.
22.76ms
45.52ms
.
113.8ms