MAX6604AATA+T Maxim Integrated Products, MAX6604AATA+T Datasheet - Page 9

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MAX6604AATA+T

Manufacturer Part Number
MAX6604AATA+T
Description
IC TEMP SENSOR DDR PREC 8-TDFN
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX6604AATA+T

Function
Temp Monitoring System (Sensor)
Sensor Type
Internal
Sensing Temperature
-20°C ~ 125°C
Output Type
I²C™/SMBus™
Output Alarm
Yes
Output Fan
No
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-20°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-TDFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Topology
-
Table 4. Configuration Register (Read/Write)
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10
BIT
0
1
2
3
4
5
6
7
EVENT mode
0 = Comparator output mode (default)
1 = Interrupt mode
When either of the lock bits is set, this bit cannot be altered until unlocked.
EVENT polarity
0 = Active low (default)
1 = Active high
When either of the lock bits is set, this bit cannot be altered until unlocked.
Critical EVENT only
0 = EVENT output on alarm or critical temperature mode (default)
1 = EVENT only if temperature is above the value in the critical temp register
When the alarm window lock bit is set, this bit cannot be altered until unlocked.
EVENT output control
0 = EVENT output disabled (default) [Disabled means EVENT remains in an inactive voltage level]
1 = EVENT output enabled
When either of the lock bits is set, this bit cannot be altered until unlocked.
EVENT output status (read only)
0 = EVENT output condition is not being asserted by this device
1 = EVENT output is being asserted by this device due to alarm window or critical trip condition
The actual conditions causing an EVENT output can be determined from the temperature register. Interrupt mode can be
cleared by writing to the clear EVENT bit. Writing to this bit has no effect; this bit is not affected by the polarity setting.
Clear EVENT (write only)
0 = No effect
1 = Clears active event in interrupt mode. Writing to this register has no effect in comparator mode
When read, this bit always returns to zero.
Alarm window lock bit
0 = Alarm trips are not locked and can be altered (default)
1 = Alarm trip register settings cannot be altered
This bit is initially cleared. When set, this bit returns a 1 and remains locked until cleared by the internal power-on reset.
Lock bits and other configuration register bits are updated during the same write; double writes are not necessary.
Critical trip lock bit
0 = Critical trip is not locked and can be altered (default)
1 = Critical trip register settings cannot be altered
This bit is initially cleared. When set, this bit returns a 1 and remains locked until cleared by the internal power-on reset.
Lock bits and other configuration register bits are updated during the same write; double writes are not necessary.
_______________________________________________________________________________________
DEFINITION (DESCRIPTIONS IN BOLD TYPE ARE THE DEFAULT VALUES)
Precision Temperature Monitor for
Bit 9
Bit 8
Bit 7
DDR Memory Modules
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
9

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