ADT7473ARQZ-1RL ON Semiconductor, ADT7473ARQZ-1RL Datasheet - Page 22

• Manufacturer Part Number: ADT7473ARQZ-1RL
• Description: IC REMOTE THERMAL CTLR 16QSOP
• Manufacturer: ON Semiconductor
• Series: dBCool®r

Specifications of ADT7473ARQZ-1RL

• Function: Fan Control, Temp Monitor
• Topology: ADC, Comparator, Fan Speed Counter, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: -40°C ~ 125°C, External Sensor
• Output Type: SMBus™
• Output Alarm: No
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-QSOP
• Full Temp Accuracy: +/- 0.5 C
• Digital Output - Bus Interface: Serial (3-Wire, 4-Wire)
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

THERM as an Input
ADT7473/ADT7473−1 can time assertions on the THERM
pin. This can be useful for connecting to the PROCHOT
output of a CPU to gauge system performance. See the
THERM Timer section for more information.
that, when the THERM pin is driven low externally, the fans
run at 100%. The fans run at 100% for the duration of the
time the THERM pin is pulled low. This is done by setting
the BOOST bit (Bit 2) in Configuration Register 3 (0x78)
to 1. This works only if the fan is already running, for
example, in manual mode when the current duty cycle is
above 0x00, or in automatic mode when the temperature is
above T
cycle in manual mode is set to 0x00, then pulling the
THERM low externally has no effect. See Figure 31 for
more information.
THERM Timer
measure THERM assertion time. For example, the THERM
input can be connected to the PROCHOT output of a Pentium
4 CPU to measure system performance. The THERM input
can also be connected to the output of a trip point temperature
sensor.
ADT7473/ADT7473−1 THERM input and stopped when
THERM is deasserted. The timer counts THERM times
cumulatively; that is, the timer resumes counting on the next
THERM assertion. The THERM timer continues to
accumulate THERM assertion times until the timer is read (it
is cleared on read) or until it reaches full scale. If the counter
reaches full scale, it stops at that reading until cleared.
so that Bit 0 is set to 1 on the first THERM assertion. Once
the cumulative THERM assertion time has exceeded
45.52 ms, Bit 1 of the THERM timer is set and Bit 0 becomes
T
THERM
THERM ASSERTED TO LOW AS AN INPUT:
FANS DO NOT GO TO 100% BECAUSE
TEMPERATURE IS BELOW T
MIN
When THERM is configured as an input, the
The user can also set up the ADT7473/ADT7473−1 so
The ADT7473/ADT7473−1 has an internal timer to
The timer is started on the assertion of the
The 8−bit THERM timer status register (0x79) is designed
Figure 31. Asserting THERM Low as an Input in
MIN
Automatic Fan Speed Control Mode
. If the temperature is below T
MIN
.
THERM ASSERTED TO LOW AS AN INPUT:
FANS DO NOT GO TO 100% BECAUSE
TEMPERATURE IS ABOVE T
MIN
or if the duty
MIN
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22
the LSB of the timer with a resolution of 22.76 ms (see
Figure 32).
After a THERM timer read (0x79):
then the following happens:
Generating SMBALERT Interrupts from THERM Timer
Events
SMBALERT when a programmable THERM timer limit is
exceeded. This allows the system designer to ignore brief,
infrequent THERM assertions, while capturing longer
THERM timer events. Register 0x7A is the THERM timer
limit register. This 8−bit register allows a limit from 0 sec
(first THERM assertion) to 5.825 sec to be set before an
SMBALERT is generated. The THERM timer value is
compared with the contents of the THERM timer limit
register. If the THERM timer value exceeds the THERM
timer limit value, the F4P bit (Bit 5) of Interrupt Status
Register 2 is set and an SMBALERT is generated. The F4P
bit (Bit 5) of Interrupt Mask Register 2 (0x75) masks out the
When using the THERM timer, be aware of the following.
If the THERM timer is read during a THERM assertion,
The
1. The contents of the timer are cleared on read.
2. The F4P bit (Bit 5) of Interrupt Status Register 2
1. The contents of the timer are cleared.
2. Bit 0 of the THERM timer is set to 1 (because a
3. The THERM timer increments from 0.
4. If the THERM timer limit (Register 0x7A) = 0x00,
Figure 32. Understanding the THERM Timer
(REG. 0x79)
(REG. 0x79)
(REG. 0x79)
needs to be cleared (assuming that the THERM
timer limit has been exceeded).
THERM assertion is occurring).
the F4P bit is set.
THERM
THERM
THERM
THERM
THERM
THERM
TIMER
TIMER
TIMER
ADT7473/ADT7473−1
ACCUMULATE THERM LOW
ACCUMULATE THERM LOW
ASSERTION TIMES
ASSERTION TIMES
0 0 0
7 6 5
0 0 0
7 6 5
0 0 0
7 6 5
0
4
0
4
0
4
0 0 0 1
3 2 1 0
0 0 1 0
3 2 1 0
0 1 0 1
3 2 1 0
THERM ASSERTED ≥ 113.8ms
(91.04ms + 22.76ms)
THERM ASSERTED
THERM ASSERTED
can
≤ 22.76ms
≥ 45.52ms
generate
an