SI8250-IM Silicon Laboratories Inc, SI8250-IM Datasheet - Page 6

IC DIGITAL PWR CONTROLLER 32LQFP

SI8250-IM

Manufacturer Part Number
SI8250-IM
Description
IC DIGITAL PWR CONTROLLER 32LQFP
Manufacturer
Silicon Laboratories Inc
Type
Power Supply Supervisoryr
Datasheet

Specifications of SI8250-IM

Applications
Digital Power Controller
Voltage - Supply
2.25 V ~ 2.75 V
Current - Supply
26mA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
28-QFN
Product
MOSFET Gate Drivers
Supply Voltage (min)
2.25 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
For Use With
336-1323 - KIT REFERENCE DESIGN FOR SI825X
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Voltage - Input
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI8250-IM
Manufacturer:
Silicon Labs
Quantity:
135
Part Number:
SI8250-IM
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
SI8250-IMR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Si8250/1/2
Table 4. ADC0 (12-Bit ADC) Specifications
T
6
DC Accuracy
Resolution
Integral nonlinearity
Differential nonlinearity
Offset error
Full scale error
Offset temperature coefficient
Dynamic Performance (10 kHz sine-wave Single-ended input, 0 to 1 dB below Full Scale, 200 ksps)
Signal-to-noise plus distortion
Total harmonic distortion
Spurious-free dynamic range
Conversion Rate
Conversion time in SAR clocks
Track/Hold acquisition time
Throughput rate
Analog Inputs
Input voltage range
Input capacitance
Temperature Sensor
Linearity
Gain
Offset
Power Specifications
Power supply current
(V
Power-on time
Power supply rejection
Notes:
A
= –40 to +125 °C, V
DD
1. An additional two
2. Additional tracking time may be required depending on the output impedance connected to the ADC input.
3. Represents one standard deviation from the mean.
4. Includes ADC offset, gain, and linearity variations.
supplied to ADC0)
Parameter
DD
F
= 2.5 V, SYSCLK = 25 MHz, PLLCLK = 200 MHz unless otherwise specified.
CLK
cycles are required to start and complete a conversion.
Operating Mode, 200 ksps
Notes 3, 4 (Temp = 0 °C)
Guaranteed Monotonic
Up to the 5
before tracking begins
Differential Mode
After V
Conditions
Notes 3, 4
Notes 3, 4
Note 1
Note 2
Rev. 1.0
REF
th
harmonic
settle,
Min
1
0
13600
1353
±0.2
Typ
–73
488
780
0.7
12
±3
64
83
13
15
3
5
V
Max
200
±2
±1
REF
ppm/°C
clocks
µV/°C
Units
mV/V
ksps
LSB
LSB
LSB
LSB
bits
mV
dB
dB
dB
µA
µs
pF
°C
µs
V

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