MAX17000AETG+ Maxim Integrated Products, MAX17000AETG+ Datasheet - Page 30

• Manufacturer Part Number: MAX17000AETG+
• Description: IC PWM CTLR DDR/DDR2/DDR3 24TQFN
• Manufacturer: Maxim Integrated Products
• Series: Quick-PWM™r

Specifications of MAX17000AETG+

• Applications: Memory, DDR2/DDR3 Regulator
• Current - Supply: 2mA
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Complete DDR2 and DDR3 Memory
Power-Management Solution
Careful PCB layout is critical to achieve low switching
losses and clean, stable operation. The switching
power stage requires particular attention. If possible,
mount all the power components on the topside of the
board, with their ground terminals flush against one
another. Follow these guidelines for good PCB layout:
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Keep the high-current paths short, especially at the
ground terminals. This practice is essential for sta-
ble, jitter-free operation.
Keep the power traces and load connections short.
This practice is essential for high efficiency. Using
thick copper PCBs (2oz vs. 1oz) can enhance full-
load efficiency by 1% or more. Correctly routing
PCB traces is a difficult task that must be
approached in terms of fractions of centimeters,
where a single milliohm of excess trace resistance
causes a measurable efficiency penalty.
Minimize current-sensing errors by connecting CSH
and CSL directly across the current-sense resistor
(R
When trade-offs in trace lengths must be made, it is
preferable to allow the inductor-charging path to be
made longer than the discharge path. For example,
it is better to allow some extra distance between the
input capacitors and the high-side MOSFET than to
allow distance between the inductor and the low-
side MOSFET or between the inductor and the out-
put filter capacitor.
Route high-speed switching nodes (BST, LX, DH,
and DL) away from sensitive analog areas (REFIN,
FB, CSH, and CSL).
______________________________________________________________________________________
SENSE
).
Applications Information
PCB Layout Guidelines
1) Place the power components first, with ground ter-
2) Mount the controller IC adjacent to the low-side
3) Group the gate-drive components (BST diode and
4) Make the DC-DC controller ground connections as
5) Connect the output power planes directly to the out-
minals adjacent (low-side MOSFET source, C
C
ble, make all these connections on the top layer
with wide, copper-filled areas.
MOSFET, preferably on the backside opposite the
MOSFETs to keep LX, AGND, DH, and the DL gate-
drive lines short and wide. The DL and DH gate
traces must be short and wide (50 mils to 100 mils
wide if the MOSFET is 1in from the controller IC) to
keep the driver impedance low and for proper
adaptive dead-time sensing.
capacitor, V
controller IC.
shown in Figures 1 and 9. This diagram can be
viewed as having two separate ground planes:
power ground, where all the high-power compo-
nents go; and an analog ground plane for sensitive
analog components. The analog ground plane and
power ground plane must meet only at a single
point directly at the IC.
put filter capacitor positive and negative terminals
with multiple vias. Place the entire DC-to-DC con-
verter circuit as close as is practical to the load.
OUT
, and anode of the low-side Schottky). If possi-
DD
bypass capacitor) together near the
Layout Procedure
IN
,