MAX17000AETG+ Maxim Integrated Products, MAX17000AETG+ Datasheet - Page 15

IC PWM CTLR DDR/DDR2/DDR3 24TQFN

MAX17000AETG+

Manufacturer Part Number
MAX17000AETG+
Description
IC PWM CTLR DDR/DDR2/DDR3 24TQFN
Manufacturer
Maxim Integrated Products
Series
Quick-PWM™r
Datasheet

Specifications of MAX17000AETG+

Applications
Memory, DDR2/DDR3 Regulator
Current - Supply
2mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-TQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 3. Operating Mode Truth Table
1
2
3
4
5
6
7
8
9
SHDN
L
L
H
H
H
H
H
H
L
H
H
L
L
STDBY
L
L
H
H
H
X
L
L
L
______________________________________________________________________________________
H
H
SKIP
H
X
X
X
X
X
X
X
L
SMPS output ramps up in skip mode with a 1.4ms (typ) ramp time. PGOOD1 is held low until the
SMPS output is in regulation.
VTT and VTTR ramp up to the final voltage based on V
VTT is in regulation.
SMPS output ramps up in skip mode with a 1.4ms ramp time. PGOOD1 is held low until the SMPS
output is in regulation.
Once CSL or FB is in regulation, the PWM block turns off and enters standby mode.
VTT remains off throughout since STDBY is low. PGOOD2 stays low throughout. The VTT
discharge FET is enabled if OVP is high, but disabled if OVP is low.
VTTR ramps up to the final voltage based on V
Ultra-skip and standby modes are exited and the full current capability of the MAX17000 is
available.
VTT ramps up after the internal SMPS block is ready. VTT ramps to the final voltage based on
V
PGOOD2 goes high when VTT is in regulation.
SMPS output is in forced-PWM mode.
VTT and VTTR are enabled.
PGOOD1 is high when the SMPS output is in regulation.
PGOOD2 is high when VTT is in regulation.
SMPS output is in normal skip mode.
VTT and VTTR are enabled.
PGOOD1 is high when the SMPS output is in regulation.
PGOOD2 is high when VTT is in regulation.
SMPS output is in ultra-skip mode.
VTT is off and is high impedance.
PGOOD2 is forced low.
VTTR is active and regulates to V
Ultra-skip or skip mode is exited as the MAX17000 ramps the output down to zero.
VTTR tracks V
Ultra-skip or skip mode is exited as the MAX17000 ramps the output down to zero.
VTTR tracks V
low. VTT is not enabled throughout soft-shutdown.
DL low. Internal16
OVP is low.
CSL
Complete DDR2 and DDR3 Memory
/2 or V
REFIN
CSL
CSL
.
/2 or V
/2 or V
Power-Management Solution
discharge MOSFETs on CSL and VTT enabled if OVP is high, but disabled if
REFIN
REFIN
during shutdown. After the SMPS output reaches 25mV, DL goes low.
during shutdown. After the SMPS output reaches 25mV, DL goes
CSL
/2 or V
OPERATION
REFIN
CSL
.
/2 or V
CSL
REFIN
/2 or V
.
REFIN
. PGOOD2 is held low until
15

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