TDA4916GG Infineon Technologies, TDA4916GG Datasheet - Page 9

• Manufacturer Part Number: TDA4916GG
• Description: IC SMPS W/ MOSFET OUTPUT PDSO-24
• Manufacturer: Infineon Technologies

Specifications of TDA4916GG

• Applications: Power Supplies
• Current - Supply: 8mA
• Voltage - Supply: 0 V ~ 15 V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: DSO-24
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: SP000087991; TDA4916GGNT; TDA4916GGXT

TDA 4916 GG
Operational Amplifier OP
Opamp OP is a high-quality operational amplifier. It can be used in the control circuit to
transfer the variations in the voltage to be regulated in amplified form to the free plus
input of comparator K1. As a result, a voltage change is converted into a duty factor
change. The output of OP is an open collector. The frequency response of OP is already
corrected. The plus input is connected internally via a capacitor to ground. This gives the
inverting amplifier a more favorable phase response.
Turn-OFF Flip-Flop AFF
A pulse is fed to the set input of the turn-OFF Flip-Flop with the falling edge of the
frequency generator signal. However, it can only really be set if no reset signal is applied.
With a set turn-OFF Flip-Flop, the output is enabled and can be active. The Flip-Flop
inhibits the output in the event of a turn-OFF signal from K1, K5, K6 or K7.
Fault Flip-Flop
Fault signals fed to the reset input of the fault Flip-Flop cause the output to be
C
immediately disabled (Low), and to be turned on again via the soft start
after
SS
removing fault-condition.
C
Soft Start
SS
The smaller of the two voltages at the plus inputs of K1 - compared with the ramp
generator voltage - is a measure of the duty factor at the output. At the instant the device
C
is turned-ON, the voltage on capacitor
equals zero. Provided no fault exists, the
SS
capacitor is charged up to its maximum value.
C
is discharged in the event of a fault. However, the fault Flip-Flop inhibits the output
SS
immediately. Below a charging voltage of approx. 1.5 V, a set signal is applied to the fault
Flip-Flop and the output is enabled, provided a reset signal is not applied
simultaneously. However, since the minimum ramp generator voltage is about 1.8 V, the
duty factor at the output is not actually slowly and continuously increased until the
voltage on
C
exceeds a value of 1.8 V.
SS
C
The Z-diode limits the voltage on capacitor
. The voltage at the ramp generator can
SS
reach a higher level than the Zener voltage. With a suitable ramp generator rising edge
slope, the duty factor can be limited to a wanted maximum value.
Pulse Omission PO
In the event of overcurrent in the SIPMOS transistors it is frequently necessary to omit
pulses even with minimum duty factor. Only this measure ensures that the SIPMOS
transistors cannot be overloaded. This wanted function can be achieved with Pulse
Omission PO and Overcurrent Comparator K7 by means of a suitable external circuit.
Version 2.0
9
1 May 1996