IR3523MTRPBF International Rectifier, IR3523MTRPBF Datasheet - Page 20

• Manufacturer Part Number: IR3523MTRPBF
• Description: IC XPHASE3 CTLR VR11.1 40-MLPQ
• Manufacturer: International Rectifier
• Series: XPhase3™r

Specifications of IR3523MTRPBF

• Applications: Processor
• Current - Supply: 10mA
• Voltage - Supply: 4.75 V ~ 7.5 V
• Operating Temperature: 0°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 40-MLPQ
• Ic Function: Dual Output Control IC
• Supply Voltage Range: 4.75V To 7.5V
• Operating Temperature Range: 0°C To +150°C
• Digital Ic Case Style: MLPQ
• No. Of Pins: 40
• Controller Type: XPhase
• Rohs Compliant: Yes
• Package: 40-Lead MLPQ
• Circuit: X-Phase Control IC
• Switch Freq (khz): 250kHz to 1.5MHz
• Pbf: PbF Option Available
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

IR3523
Figure 13 - VCCL regulator stability with 5 phases and PHSOUT equals 750 kHz
VCCL Under Voltage Lockout (UVLO)
The IR3523 has no under voltage lockout protection for the converter input voltage (VCC), but monitors the VCCL
voltage instead. The VCCL is used to power both the control IC and phase ICs including the phase ICs internal gate
drivers. During power up, the UVLO fault latch will be reset if VCCL is above 94% of the voltage set by resistor
divider at VCCLFB pin. If VCCL voltage drops below 86% of the set value, the UVLO fault latch will be set.
Power Good (PG1, 2)
The PGx pin is an open-collector output and should be pulled up to a voltage source through a resistor. During soft
start, the PGx remains low until the output voltage is in regulation and SS/DELx is above 3.93V. The PGx pin
becomes low if any of the fault latches are triggered (See Table 3).
PGx monitors the output voltage. If any of the voltage planes fall out of regulation, PGx will become low, but the VR
will continue to attempt to regulate the output voltages. Output voltage out of spec is defined as 315mV to 275mV
below nominal voltage. VID on-the-fly transition, which is a voltage plane transitioning between two different VID
codes, is not considered to be out of specification.
A high level at the PGx pins indicates that the converter is in operation with no fault and ensures the output voltage
is within the regulation.
The PG outputs derive power from either VCCL or VCCLDRV to ensure they can assert with input voltage as low as
possible.
Open Control Loop Detection
The error amplifier’s output voltage is monitored to ensure the control loop is in regulation. If any fault condition
forces the error amplifier output above VCCL-1.08 V for 8 switching cycles, the Open Control Loop fault latch is set.
This fault latch can only be cleared by cycling power to VCCL.
Load Current Indicator Output
The VDRP pin voltage represents the average current of the converter plus the VDAC1 voltage. The load current
information can be retrieved by using a differential amplifier to subtracts the VDAC1 voltage from the VDRP1
voltage.
Page 20 of 37
June 20, 2008