IR3502BMTRPBF International Rectifier, IR3502BMTRPBF Datasheet - Page 27

• Manufacturer Part Number: IR3502BMTRPBF
• Description: IC REG XPH INTEL VR11.1 32-MLPQ
• Manufacturer: International Rectifier
• Series: XPhase3™r

Specifications of IR3502BMTRPBF

• Package / Case: 32-MLPQ
• Mounting Type: Surface Mount
• Current - Supply: 8mA
• Voltage - Supply: 8 V ~ 16 V
• Operating Temperature: 0°C ~ 100°C
• Applications: Processor
• Operating Temperature (max): 150C
• Operating Temperature (min): 0C
• Pin Count: 32
• Mounting: Surface Mount
• Package Type: MLPQ
• Case Length: 5mm
• Screening Level: Commercial
• Package: 32-Lead MLPQ
• Circuit: X-Phase Control IC
• Switch Freq (khz): 250kHz to 1.5MHz
• Pbf: PbF Option Available
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The soft start delay time (TD1) and VR ready delay time (TD3) are determined by (8) to (9) respectively.
Once C
VDAC Slew Rate Programming Capacitor C
The slew rate of VDAC slope SR
where I
The resistor R
Current Report Gain and Thermal Compensation
Intel VR11.1 specifications require IMON to report the core maximum load current of the CPU be reported as 1 V
nominal. The core maximum current can be different for different platforms. The IMON tuning resistors can
therefore be adjusted and thermally compensated to adjust the load current gain with respect to the IMON. The
expressions that govern the relationship between load current, IMON, and VDRP at room temperature are given
by
The change in inductor DCR with temperature is compensated by an equivalent variation in the RTHERM. The
following equations derive the RTCMP1 and RTCMP2 if RTCMP3 and the thermistor (RTHERM and β
fixed.
SINK
SS/DEL
Page 27 of 38
is the sink current of VDAC pin. The slew rate of VDAC up-slope is the same as that of down-slope.
VDAC
is chosen, the minimum over-current fault latch delay time
is used to compensate VDAC circuit and can be calculated as follows
VDRP
K
THERM

IMON
VDAC
t
OCDEL
TD
C
R
_
SS
room
L
3
/
DOWN
_

DEL

MAX

1
3


C
1
3
C
R


TD
SS





C
VDAC
VDAC
I





R
1
o
TD
/
can be programmed by the external capacitor C
R
SS
V
1
DEL
max
L
R
L

I
_
/
2
_
DEL
room
I
DISCHG
L

V
room

*
C
CHG
*
,
n
_
O
n
SR
I
SS
4 (
room
VDAC
K
2
CHG

*
I

0 .
G
/
I

SINK
G
c
DOWN
DEL
. 0
CHG

_
cs

cs

room
12

V


  

1 [
and Resistor R

  

1 *
900
O
TD






)
1



4 .

1


2

3850
44
SR
kHz
(
C
1

*
(
R
C
(
RTCMP
52
SS
*
C
RTCMP
V
DOWN
SS
L
55
52
10
SS
O
_
/
5 .

/
DEL
room
52
DEL
C
*
5 .
/

*
*
DEL
6
n
10
10
10
VDAC
*
5 .
*
10

*
*

) 2
) 2
G
1 *


. 0
6
4 (
10
6

6
VDAC
II
cs
6
II
4 .
0 .
12


(
)
(
6
(

RTCMP
RTCMP
T
,
V
t
L
K
OCDEL
O
RTCMP
RTCMP
_
)
c
MAX
_
t
max
1
1



is fixed and can be quantified as
RTHERM
3

RTHERM
3
T
room
(
R
L
)]
_
max
VDAC
n
_
_

room
G
room
as defined in (11),
cs
IR3502B
)
)
)

 


 

V3.2
I
I
o
o
THERM
) are
(13)
(14)
(15)
(16)
(10)
(11)
(12)
(7)
(8)
(9)