PM6670S STMicroelectronics, PM6670S Datasheet - Page 37

IC CTLR DDR2/3 MEM PS VFQFPN-24

PM6670S

Manufacturer Part Number
PM6670S
Description
IC CTLR DDR2/3 MEM PS VFQFPN-24
Manufacturer
STMicroelectronics
Datasheet

Specifications of PM6670S

Applications
Memory, DDR2/DDR3 Regulator
Current - Supply
800µA
Voltage - Supply
4.5 V ~ 36 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-VFQFN, 24-VFQFPN
For Use With
497-8411 - BOARD EVAL PM6670S DDR2/3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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PM6670S
7.2
7.2.1
7.2.2
VTTREF buffered reference and VTT LDO section
The PM6670S provides the required DDR2/3 reference voltage on the VTTREF pin. The
internal buffer tracks half the voltage on the VSNS pin and has a sink and source capability
up to 15 mA.
Higher currents rapidly deteriorate the output accuracy. A 10 nF to 100 nF (33 nF typ.)
bypass capacitor to SGND is required for stability.
The VTT low-drop-out linear regulator has been designed to sink and source up to 2 A peak
current and 1 A continuously. The VTT voltage tracks VTTREF within ± 35 mV.
A remote voltage sensing pin (VTTSNS) is provided to recovery voltage drops due to
parasitic resistance. In DDR2/3 applications, the linear regulator input LDOIN is typically
connected to VDDQ output; connecting LDOIN pin to a lower voltage, if available in the
system, reduces the power dissipation of the LDO.
A minimum output capacitance of 20 μF (2x10 μF MLCC capacitors) is enough to assure
stability and fast load transient response.
VTT and VTTREF Soft-Start
Soft-Start on VTT and VTTREF outputs is achieved by current clamping.
The LDO linear regulator is provided with a current foldback protection: when the output
voltage exits the internal ±10 % VTT-Good window, the output current is clamped at ±1 A.
Re-entering VTT-Good window releases the current limit clamping.
The foldback mechanism naturally implements a two steps soft-start charging the output
capacitors with a 1 A constant current.
Something similar occurs at VTTREF pin, where the output capacitor is smoothly charged at
a fixed 40 mA current limit.
VTTREF and VTT outputs discharge
The tracking discharge mechanism involves the VTT linear regulator. When the suspend-to-
disk state is entered, the switching regulator is turned OFF.
At the same time the LDO drains a 1 A constant current from LDOIN and keeps VTT in track
with VTTREF that, in turn, is half the voltage at the VSNS pin. When the VDDQ output
reaches 400 mV, the PM6670S switches on the internal discharge MOSFETs to complete
the process (see
In soft discharge (i.e. non-tracking discharge) the PM6670S disables the internal regulators
and suddenly turns on the discharge MOSFETs on each output.
Section 7.1.8: VDDQ output discharge on page 34
Doc ID 14432 Rev 4
).
Device description
37/54

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