LT3420EMS-1#PBF Linear Technology, LT3420EMS-1#PBF Datasheet - Page 11

IC PHOTOFLASH CAP CHARGER 10MSOP

LT3420EMS-1#PBF

Manufacturer Part Number
LT3420EMS-1#PBF
Description
IC PHOTOFLASH CAP CHARGER 10MSOP
Manufacturer
Linear Technology
Datasheet

Specifications of LT3420EMS-1#PBF

Applications
Photoflash Capacitor Charger
Current - Supply
90µA
Voltage - Supply
2.2 V ~ 16 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
10-MSOP, Micro10™, 10-uMAX, 10-uSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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APPLICATIO S I FOR ATIO
must be taken into account for the dynamic blocking
voltage capabilities of the LT3420/LT3420-1. The dynamic
blocking voltage capability of both parts is 38V.
Table 1 summarizes the various breakdown voltages of the
SW pin for both parts.
Table 1. SW Pin Voltage Ratings
PART
LT3420
LT3420-1
Figure 7 shows what to examine in a new transformer
design to determine if the specifications for the SW pin are
met.
The first leakage inductance spike labeled “A” must not
exceed the dynamic rating of the SW pin. If it does exceed
the rating, then the transformer leakage inductance must
be lowered. The flyback waveform after the initial spike
labeled “B” must not exceed the DC rating of the SW pin.
If it does exceed the rating, then the turns ratio of the
transformer must be lowered. In measuring the voltage on
the SW pin, care must be taken in minimizing the ground
loop of the voltage probe. Careless probing will result in
inaccurate readings.
SW PIN DC RATING
38V
50V
U
U
V
I
PRI
SW
0A
0V
SW PIN DYNAMIC RATING
Figure 7. New Transformer Design Check (Not to Scale)
W
38V
38V
U
“A”
“B”
Note also the magnitude of the initial current spike in the
primary of the transformer labeled “C” when the power
switch turns on. If the leakage inductance is lowered to a
very low level, the internal capacitances of the transformer
will be high. This will result in the initial spike of current in
the primary becoming excessively high. The level of “C”
should be kept to 4A or less in a typical design for both the
LT3420 and LT3420-1. Please note that by inserting a loop
of wire in the primary to measure the primary current, the
leakage inductance of the primary will be made artificially
high. This may result in erroneous voltage measurements
on the SW pin.
The measurements shown in Figure 7 should be made
with both V
given application. This results in the highest voltage and
current stress on the SW pin.
Transformer Secondary Capacitance
The total capacitance of the secondary should be mini-
mized for both efficient and proper operation of the LT3420/
LT3420-1. Since the secondary of the transformer under-
goes large voltage swings (approaching 600V
capacitance on the secondary can severely affect the
“C”
MUST BE LESS THAN 4A
FOR BOTH THE LT3420
AND LT3420-1
MUST BE LESS THAN 38V
FOR THE LT3420
MUST BE LESS THAN 50V
FOR THE LT3420-1
MUST BE LESS THAN 38V
FOR BOTH THE LT3420
AND LT3420-1
OUT
and V
BAT
3420 F07
LT3420/LT3420-1
at the maximum levels for the
P-P
11
), any
3420fb

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