LTC3589HUJ#PBF Linear Technology, LTC3589HUJ#PBF Datasheet - Page 32

• Manufacturer Part Number: LTC3589HUJ#PBF
• Description: IC DC/DC CONV 8-OUTPUT 40QFN
• Manufacturer: Linear Technology

Specifications of LTC3589HUJ#PBF

• Applications: Handheld/Mobile Devices
• Current - Supply: 8µA
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 150°C
• Mounting Type: Surface Mount
• Package / Case: *
• Primary Input Voltage: 5.5V
• No. Of Outputs: 8
• Output Voltage: 5V
• Output Current: 1.6A
• No. Of Pins: 40
• Operating Temperature Range: -40°C To +150°C
• Msl: MSL 1 - Unlimited
• No. Of Ldo Regulators: 3
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

OPERATION
LTC3589/LTC3589-1
PGOOD Pin and PGSTAT Status Register Function
Each LTC3589/LTC3589-1 regulator has an internal power
good output that is active whenever the regulators feedback
pin is closer than 7% (typical) from its input reference
voltage. If any of the internal power good signals indicate
a low voltage for longer than 25μs (typical), the PGOOD
pin is pulled LOW and the appropriate bit in the PGSTAT
status register (Table 15) is set.
Table 15. PGSTAT Read-Only Register Bit Definitions
Figure 14 shows the PGOOD pin and PGSTAT status reg-
ister timing. When no regulator is enabled, the PGOOD
pin is pulled LOW and PGSTAT bits are LOW. PGOOD and
32
PGOOD
PGSTAT[BIT] VALUE SETTING
WAKE
V
OUTx
ENx
IRQ
Figure 14. PGOOD Pin and PGSTAT Status Register Timing
0
1
2
3
4
5
6
7
250μs
ENABLE
200μs
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
UNDERVOLTAGE
25μs
LDO1_STBY Output Low
LDO1_STBY Output Good
Step-Down Switching Regulator 1 Output Low
Step-Down Switching Regulator 1 Output Good
Step-Down Switching Regulator 2 Output Low
Step-Down Switching Regulator 2 Output Good
Step-Down Switching Regulator 3 Output Low
Step-Down Switching Regulator 3 Output Good
Buck-Boost Regulator 4 Output Low
Buck-Boost Regulator 4 Output Good
LDO2 Output Low
LDO2 Output Good
LDO3 Output Low
LDO3 Output Good
LDO4 Output Low
LDO4 Output Good
250μs
25μs
UNDERVOLTAGE
EXTENDED
(FAULT)
14ms
1sec
WAKE HIGH AFTER 1sec
250μs
IF PWR_ON HIGH
DISABLED IF
WAKE LOW
DISABLE
3589 F14
the PGSTAT bits are HIGH 250μs after the last enabled
regulator is within 7% of its target.
If any enabled regulator output falls more than 7% low
for longer than 25μs PGOOD is pulled LOW and a cor-
responding status bit in the PGSTAT register is set to 0.
The PGOOD pin and PGSTAT status bit remain LOW for
as long as the low voltage condition persists plus 250μs.
An extended low output rail causing the PGOOD pin to
be LOW for longer than 14ms defines a PGOOD timeout
fault condition that triggers a hard reset if not masked in
I
remains in normal operation.
During a dynamic voltage slew, PGOOD is pulled LOW
unless bit 5 in the dynamic target voltage register for
each regulator is set HIGH. The status register PGSTAT
is unaffected by a dynamic voltage slew.
Undervoltage Detection
The LTC3589 undervoltage (UV) detection circuit will out-
put a fault condition, locking out regulator operation, until
V
LTC3589-1 will operate normally until V
(typical). When V
initiates a hard shutdown reset. Figure 15 shows under-
voltage warning and fault detection levels.
An undervoltage warning sets register bit IRQSTAT[4] and
pulls the IRQ pin LOW.
To minimize standby quiescent current the UVLO and
thermal sensor circuits are disabled when all the regula-
tors are off.
2
IN
C register bit SCR2[7]. When SCR2[7] is HIGH, PGOOD
reaches 2.7V. Once V
Figure 15. UV Detection Hard Reset and Warning Levels
UNDERVOLTAGE
V
IN
IN
drops below 2.55V, the fault condition
2.55V
FAULT
IN
2.65V
is above 2.7V the LTC3589/
2.9V
WARNING
IN
3V
drops to 2.55V
3589 F15
V
IN
3589fc