LTC3589HUJ#PBF Linear Technology, LTC3589HUJ#PBF Datasheet - Page 30

• Manufacturer Part Number: LTC3589HUJ#PBF
• Description: IC DC/DC CONV 8-OUTPUT 40QFN
• Manufacturer: Linear Technology

Specifications of LTC3589HUJ#PBF

• Applications: Handheld/Mobile Devices
• Current - Supply: 8µA
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 150°C
• Mounting Type: Surface Mount
• Package / Case: *
• Primary Input Voltage: 5.5V
• No. Of Outputs: 8
• Output Voltage: 5V
• Output Current: 1.6A
• No. Of Pins: 40
• Operating Temperature Range: -40°C To +150°C
• Msl: MSL 1 - Unlimited
• No. Of Ldo Regulators: 3
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

OPERATION
LTC3589/LTC3589-1
30
PWR_ON
PWR_ON
PWR_ON
PBSTAT
ON(PB)
PWR_ON
PBSTAT
ON(PB)
PBSTAT
ON(PB)
WAKE
PBSTAT
ON(PB)
WAKE
WAKE
RSTO
PWR_ON
CLIRQ
FAULT
WAKE
PBSTAT
ON(PB)
IRQ
Figure 8. Power-Up and Down Using PWR_ON Pin
WAKE
Figure 10. Hard Reset Due to a Fault Condition
Figure 7. Power Down Using Pushbutton
Figure 9. Hard Reset Using the Pushbutton
Figure 6. Power-Up Using the Pushbutton
50ms - LTC3589
2ms - LTC3589-1
μC/μP CONTROL
50ms
μC/μP CONTROL
50ms
400ms
μC/μP CONTROL
5 SEC
<1 SEC
5 SEC
μC/μP CONTROL
μC/μP CONTROL
<5 SEC
<5 SEC
50ms
50ms - LTC3589
2ms - LTC3589-1
1 SEC
3589 F08
3589 F06
3589 F09
3589 F07
3589 F10
ENABLE AND POWER-ON SEQUENCING
Enable Input Pin Operation
The regulator enable input pins facilitate pin-strapping an
output rail to the enable pin of the next regulator in the
desired sequence. The regulator enable inputs normally
have a 0.8V (typical) input threshold. If any enable is driven
HIGH, the remaining enable input thresholds switch to a
more accurate 500mV (typical) threshold.
Figure 11 shows an application circuit for a typical pin-
strapped start-up sequence. Holding ON LOW for 400ms
brings up the WAKE pin that is tied to EN1 and EN3 to en-
able step-down switching regulators 1 and 3. The output of
regulator 1 is tied to EN2 and EN4 that enables step-down
switching regulator 2 and the buck-boost switching regulator
4. The output of step-down switching regulator 2 is tied to
EN_LDO2 and EN_LDO3 to enable LDO2, LDO3 and LDO4.
Within five seconds of WAKE going HIGH, the microprocessor
or microcontroller must drive PWR_ON HIGH to tell LTC3589
that rails are good and to stay in the power-on state.
Figure 12 shows the start-up timing for the application shown
in Figure 11. There is a 200μs (typical) delay between the
enable pin and the internal enable signal to each regulator.
Depending on settings in I
(SCR2), a regulator’s output must discharge to less than
300mV before it will respond to its enable. The output
discharge feature is to guarantee proper start-up sequenc-
ing. This feature and the 2.5k pull-down resistors may be
overridden by bit settings in command register SCR2.
Figure 11. Pin-Strap Start-Up Sequence Application Circuit
PWR_ON
EN1
EN2
EN3
EN4
EN_LDO2
EN_LDO34
ON
PWR_ON
LTC3589
BB_OUT
2
WAKE
LDO2
LDO3
LDO4
SW1
SW2
SW3
C system control register 2
3589 F11
1V TO 1.2V
1.8V
0.8V TO 1V
3.3V
1.2V
1.8V
2.8V
3589fc