L6258E STMicroelectronics, L6258E Datasheet
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L6258E
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L6258E Summary of contents
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... TTL/CMOS compatible inputs ■ Cross conduction protection ■ Thermal shutdow Description L6258E is a dual full bridge for motor control applications realized in BCD technology, with the capability of driving both windings of a bipolar stepper motor or bidirectionally control two DC motors. L6258E and a few external components form a complete control and drive circuit ...
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... Error amplifier and sense amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.5 Effect of the Bemf on the current control loop stability . . . . . . . . . . . . . . . 22 4 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.1 Interference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.2 Motor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.3 Unused inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.4 Notes on PCB design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5 Operation mode time diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 6 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 2/31 Doc ID 8688 Rev 9 L6258E ...
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... L6258E List of tables Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. Absolute maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 3. Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 4. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 5. Current levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table 6. Charge pump capacitor's values Table 7. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Doc ID 8688 Rev 9 List of tables 3/31 ...
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... Figure 9. Aloop bode plot (compensated Figure 10. Electrical model of the load Figure 11. Typical application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Figure 12. Half step operation mode timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Figure 13. 4 bit microstep operation mode timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 14. PowerSO36 mechanical data & package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 4/31 Doc ID 8688 Rev 9 L6258E ...
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... L6258E 1 Block diagram Figure 1. Block diagram C VCP2 P VCP1 CHARGE PUMP VREF1 I3_1 I2_1 DAC I1_1 I0_1 PH_1 V (5V) VR GEN DD VREF1 I3_2 I2_2 DAC I1_2 I0_2 PH_2 TRI_CAP TRI_0 TRIANGLE GENERATOR TRI_180 C FREF GND Table 2. Absolute maximum rating Parameter ref1 ref2 boot ...
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... Bridge output connection (1) Disables the bridges for additional safety during switching. DISABLE When not connected the bridges are enabled Triangular wave generation circuit capacitor. The value of TRI_cap this capacitor defines the output switching frequency Doc ID 8688 Rev 9 L6258E 36 PWR_GND 35 SENSE1 34 OUT1B 33 ...
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... L6258E Table 3. Pin functions (continued) Pin # 13 18 Note: The number in parenthesis shows the relevant Power Bridge of the circuit. Pins 18, 19, 1 and 36 are connected together. Name V (5V) Supply voltage input for logic circuitry DD GND Power ground connection of the internal charge pump circuit ...
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... Test condition 40V S Off threshold Off threshold Both bridges ON, no Both bridges OFF Doc ID 8688 Rev 9 T Ambient Thermal J-A resistance (˚C) (˚C/ D02IN1370 80 100 120 140 D02IN1371 Min. Typ 3.3 load L6258E 160 Max. Unit 40 V 5. 1.25 V 7 ...
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... L6258E Table 4. Electrical characteristics (continued Parameter ΔT Shut down hysteresis SD-H T Thermal shutdown SD Triangular oscillator f osc frequency TRANSISTORS I Leakage current DSS R On resistance ds(on) V Flywheel diode voltage f CONTROL LOGIC V lnput voltage in(H) V Input voltage in(L) I Input current in I Disable pin input current ...
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... The current control is generated through a switch mode regulation. With this system the direction and the amplitude of the load current are depending on the relation of phase and duty cycle between the two outputs of the current control loop. The L6258E power stage is composed by power DMOS in bridge configuration shown in Figure ...
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... L6258E 2.1 Reference voltage The voltage applied to VREF pin is the reference for the internal DAC and, together with the sense resistor value, defines the maximum current into the motor winding according to the following relation: where R = sense resistor value s Figure 4. Power bridge configuration ...
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... The current level in the motor winding is selected according to this table: Table 5. Current levels 12/31 Tri_0 ERROR AMPL Tri_180 VSENSE + Gs=1/Rb SENSE TRANSCONDUCTANCE AMPL Doc ID 8688 Rev 9 POWER AMPL. VS OUTA - + OUTB D97IN625 Current level IMAX H No Current L 9.5 H 19.1 L 28.6 H 38.1 L 47.6 H 55.6 L 63.5 H 71.4 L 77.8 H 82.5 L6258E LOAD ...
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... L6258E Table 5. Current levels (continued 2.3 Phase input ( PH ) The logic level applied to this input determines the direction of the current flowing in the winding of the motor. High level on the phase input causes the motor current flowing from OUT_A to OUT_B through the load. 2.4 ...
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... As we have already mentioned, in this situation, the two outputs OUT_A and OUT_B are simultaneously driven from V case is zero and no current flows in the motor winding. 14/31 equal to zero, the transconductance loop is balanced at the value of Vr, to ground; and the differential voltage across the load in this s Doc ID 8688 Rev 9 L6258E Figure 6. ...
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... L6258E With a positive differential voltage on V positively unbalanced respected Vr. In this case being the error amplifier output voltage greater than Vr, the output of the first comparator is a square wave with a duty cycle higher than 50%, while the output of the second comparator is a square wave with a duty cycle lower than 50%. ...
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... The block diagram shows the schematics of the L6258E internal current control loop working in PWM mode; the current into the load is a function of the input control voltage ...
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... L6258E Gain and bandwidth must be chosen depending on many parameters of the application, like the characteristics of the load, power supply etc..., and most important is the stability of the system that must always be guaranteed. To have a very flexible system and to have the possibility to adapt the system to any application, the error amplifier must be compensated using an RC network connected between the output and the negative input of the same ...
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... V sense = sense ACload = -------------------- - = ---------------------- v R out ⋅ ACload dB 20 log ---------------------- = R L 0.33 ⋅ ----------------------- - Aload log 12 + 0.33 , the load has a pole at the frequency Fpole = ---------------------------------- - L L ⋅ -------------------- - 2π Fpole = --------------------------------------------- - 3 – ⋅ ⋅ -------------------------- - 6. 0.33 Doc ID 8688 Rev 9 24 29.5dB = – 31.4dB S = 163Hz L6258E ...
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... L6258E Before analysing the error amplifier block and the sense transconductance block, we have to do this consideration: Aloop = Ax| = ACpw and Bx| = ACerr this means that Ax|dB is the sum of the power amplifier and load blocks; Ax| = (29,5) + (-31.4) = -1.9dB dB The BODE analysis of the transfer function of Ax is: Figure 7 ...
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... The transfer function of the Bx block with the compensation on the error amplifier is: 20/31 Verr_out = -(ic · Zc -(Verr_out · 1 ------- - Vsense · = -(Verr_out · Rb Verr_out Bx = – ----------------------- - = – Vsense dB Aloop = AxdB + Bx dB Doc ID 8688 Rev 9 1 ------ - ) Zc 1 ------ - ) Zc Zc ------- - Rb and Bx is L6258E ...
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... L6258E In this case the Bx block has a DC gain equal to the open loop and equal to zero at a frequency given by the following formula: In order to cancel the pole of the load, the zero of the Bx block must be located at the same frequency of 163Hz; so now we have to find a compromise between the resistor and the capacitor of the compensation network ...
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... In this way the result is a shift of the total Aloop transfer function greater value. 3.5 Effect of the Bemf on the current control loop stability In order to evaluate what is the effect of the Bemf voltage of the stepper motor we have to look at the load block: 22/31 Doc ID 8688 Rev 9 L6258E ...
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... L6258E Figure 10. Electrical model of the load OUT+ OUT- The schematic now shows the equivalent circuit of the stepper motor including a sine wave voltage generator of the Bemf. The Bemf voltage of the motor is not constant, its value changes depending on the speed of the motor. Increasing the motor speed the Bemf voltage increases: Bemf = Kt · ...
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... The EA_IN1 and EA_IN2 pins carry out high impedance lines and care must be taken to avoid coupled noise on this signals. The suggestion is to put the components connected to this pins close to the L6258E, to surround them with ground tracks and to keep as far as possible fast switching outputs of the device. Remember also an 1 Mohm resistor between EA_INx and EA_OUTx to avoid output current spike during supply startup/shutdown ...
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... Since the circuit can drive a constant current through the motor, its temperature might exceed, both at low and high speed operation. 4.3 Unused inputs Unused inputs should be connected to the proper voltage levels in order to get the highest noise immunity 13,31 7 L6258E 2 SOP36 4 PACKAGE ...
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... Because the IC uses the board as a heat sink, the dissipating copper area must be sized in accordance with the required value of R 26/31 . thj-amb Doc ID 8688 Rev 9 L6258E ...
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... L6258E 5 Operation mode time diagrams Figure 12. Half step operation mode timing diagram (Phase - DAC input and motor current) Phase 1 Phase 2 I0_1 DAC 1 I1_1 Inputs I2_1 I3_1 I0_2 I1_2 DAC 2 Inputs I2_2 I3_2 100% 71.4% Motor drive Current 1 -71.4% -100% 100% 71.4% ...
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... Current 1 0 Motor drive 0 Current 2 28/ Doc ID 8688 Rev 9 Micro Step Vector Ph1 Ph2 Ph1 level 100% 95. 82.5% 63. 47.6% 38.1% 19. Current D97IN628A L6258E Ph2 0 Current MAX 100 98.4 95.2 92.1 88.9 82.5 77.8 71.4 63.5 55.6 47.6 38.1 28.6 19.1 9.5 ...
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... L6258E 6 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® trademark. Figure 14. PowerSO36 mechanical data & package dimensions DIM ...
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... Changed on the page 5 the f 7 18.5kHz Document reformatted. 8 Modified the ACpw formula in Added the disable note in Corrected replacement codes in 9 Updated Ecopack text. Doc ID 8688 Rev 9 Changes with Table parameter max. value from 17.5 to osc Section 3.2 on page 17. Section 4.1 on page 24 Table 1. L6258E 4. ...
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... L6258E Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...