L9958SB STMicroelectronics, L9958SB Datasheet - Page 12

• Manufacturer Part Number: L9958SB
• Description: IC H-BRIDGE SPI POWERSO16
• Manufacturer: STMicroelectronics

Specifications of L9958SB

• Applications: DC Motor Driver, Brushless (BLDC)
• Number Of Outputs: 2
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: PowerSO-16 Exposed Bottom Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output: -
• Voltage - Load: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Device description
3.3
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Serial peripheral interface (SPI)
The SPI is used for bidirectional communication with a control unit, allowing IC
configuration, diagnosis and identification. L9958 can also be used in daisy-chain
configuration (number of device in the daisy chain is not limited).
The SPI interface of L9958 is a slave SPI interface: the master is the µC which provides CS
and SCK to L9958.
Transfer format uses 16 bits word in case of single device configuration and multiple of 16
bits word in case of daisy chain configuration.
The first answer after Power-ON-Reset is the IC identifier.
A command sent by the µC during transfer N is answered during transfer N+1. SO is clocked
on SCK rising edge. SI is sampled on falling edge. When CS = '1' and during power-ON
reset, SO is in tri-state. Otherwise, the SPI interface is always active.
Settings made by the SPI control word become active at the end of the SPI transmission
and remain valid until a different control word is transmitted or a power on reset occurs.
At each SPI transmission, the diagnosis bits as currently valid in the error logic are
transmitted. Details on diagnosis are described in
Figure 6.
Between CS falling edge and SCK rising edge, an internal signal called "FSI bit" is set
asynchronously on SO output. This can be useful to have internal information on the device
without stimulating the SCK clock. The definition of the FSI bit is presented in the
diagnostics chapter.
Figure 7.
Except the Enable / Disable bit (“ACT” pin), all the bits of diagnosis register are latched and
can be released by:
●
●
The coding for the Configuration and Diagnosis Registers is reported in the table below.
Diagnosis register read by SPI
Power-On-Reset condition.
SPI protocol structure
FSI bit
Doc ID 17269 Rev 2
Section
5.
L9958