E-L9826TR STMicroelectronics, E-L9826TR Datasheet
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E-L9826TR
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E-L9826TR Summary of contents
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... Octal Low-Side Driver for Resistive and Inductive Loads with Serial/Parallel Input Control, Output Protection and Diagnostic Features ■ OUTPUTS CURRENT CAPABILITY UP TO 450mA ■ TYPICAL R = 1.5Ω ■ PARALLEL CONTROL INPUTS FOR OUTPUTS 1 AND 2 ■ SPI CONTROL FOR OUTPUTS ■ RESET FUNCTION WITH RESET SIGNAL AT NRES PIN OR UNDERVOLTAGE AT V ■ ...
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... Pins connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.3 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.1 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.2 Output Stages Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.3 Power outputs characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.4 Diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5 Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 6 Package Informations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2/17 CD00002120 L9826 ...
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... Block Diagram Figure 1. Block diagram NON1 Q1 Diag1 NON2 Diag2 NCS V CC CLK V CC SDI V CC SDO GND NRES Reset V CC Undervoltage RESET Latch / Driver 2 R Overtemperature Detection Fault Latch Latch / Driver Diag3 Diag1 Diag2 Diag3 Diag4 Q4 Diag5 Diag4 Diag6 Diag7 Q5 Diag8 ...
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... Pins Description and Connection Diagrams 2 Pins Description and Connection Diagrams 2.1 Pin description Table 1. Pin description N° Pin 1 Out 6 2 Out 1 3 NRes 4 NCS 5 GND 6 GND 7 NON1 8 SDO 9 Out 8 10 Out 3 11 Out 5 12 Out 2 13 SDI 14 CLK 15 GND 16 GND 17 NON2 ...
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... R Junction to Pin thj-pin OUT6 1 OUT1 2 nRES 3 NCS 4 GND 5 GND 6 NON1 7 SDO 8 OUT8 9 OUT3 10 PINCON_L9826 Parameter Test Condition CD00002120 2 Pins Description and Connection Diagrams 20 OUT4 19 OUT7 18 Vcc 17 NON2 16 GND 15 GND 14 CLK 13 SDI 12 OUT2 11 OUT5 Min. Typ. Max. 150 165 Unit ° ...
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... Output current (Out1, Out2) I OUT Output current (Out3 ... Out8) ΣI Total average-current all OUT1 1-8 outputs 3 When operating the device with short circuit at more than 2 outputs at the same time, damage due to electrical overstress may occur. 6/17 Test Condition T ≤ 1ms 1) 2) ≤ 150mA I OUT ≤ ...
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... J Test Condition without load (nRes = Low 500mA OUT1 ... 8 SPI - CLK = 3MHz NCS = LOW SDO no load I = -2A out Reset of all registers and disable of all outputs NONx, NCS, CLK, SDI NRES (V = 0V) IN (NONx, NCS, CLK, SDI) Pulldown resistance (NRes) Guaranteed by design ...
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... Turn ON voltage slew-rate on1/dt dU Turn ON voltage slew-rate on2/dt dU Turn OFF voltage slew-rate off1/dt dU Turn OFF voltage slew-rate off2/dt Serial diagnostic link (Load capacitor at SDO = 100pF) 8/17 ≤ 150°C; unless otherwise specified). J Test Condition OUTx = OFF 16V; OUTx 1mA ≤ I ≤ I ...
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... J Test Condition 50% duty cycle 4,9V ≤ V ≤ 5,1V CC Setup time CLK to NCS change H/L CLK change H/L after SDI data valid SDI data hold after CLK change H/L Multiple of 8 CLK cycles inside NCS period ...
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... The control data are transmitted via the SDI input, the timing of the serial interface is shown in Figure 4.. The device is selected with low NCS signal and the input data are transferred into the 8 bit shift register at every falling CLK edge. The rising edge of the NCS latches the new data from the shift register to the drivers. ...
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... The output current is determined by the output characteristics and the output voltage depends on the load resistance. In this mode high power is dissipated in the output transistor and its temperature increases rapidly. When the power transistor temperature exceeds the thermal shutdown threshold, the overload latch is set and the corresponding output switched off ...
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... The diagnostic bit is high. Fault condition 2) "open load" or "output short circuit to GND" is the same as of outputs 1 and 2. At the falling edge of NCS the output status data are transferred to the shift register. ...
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... L9826 Figure 6. The Pulse Diagram to Read the Outputs Status Register NCS CLK SDO SDI Table 8. The Structure of the Outputs Status Register MSB Diag2 Diag4 Diag6 Diag8 Diag1 Diag3 Diag5 Diag7 MSB MSB LSB CD00002120 4 Functional Description 2 1 LSB 2 1 LSB Diagnostic-bit output 7 ...
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... All outputs withstand testpulses without damage. The correct function of the circuit with the Test Pulses coupled to the outputs is verified during the characterization for the typical application with R = 30Ω to 100Ω 600mH loads. The Test Pulses are coupled to the outputs with 200pF series capacitor. 14/17 ...
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... L 0.40 1.27 k 0˚ (min.), 8˚ (max.) ddd 0.10 (1) “D” dimension does not include mold flash, protusions or gate burrs. Mold flash, protusions or gate burrs shall not exceed 0.15mm per side. inch MIN. TYP. MAX. MECHANICAL DATA 0.093 0.104 ...
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... Revision history 7 Revision history Date Revision 22 April 2004 26 July 2005 16/17 7 Initial release in EDOCS. Updated the Layout look & feel. 8 Modify value R in Features ON CD00002120 L9826 Changes ...
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