VN920B5-E STMicroelectronics, VN920B5-E Datasheet - Page 17

• Manufacturer Part Number: VN920B5-E
• Description: IC DRIVER HIGH SIDE P2PAK
• Manufacturer: STMicroelectronics
• Type: High Sider

Specifications of VN920B5-E

• Input Type: Non-Inverting
• Number Of Outputs: 1
• On-state Resistance: 16 mOhm
• Current - Output / Channel: 45A
• Voltage - Supply: 5.5 V ~ 36 V
• Operating Temperature: -40°C ~ 150°C
• Mounting Type: Surface Mount
• Package / Case: P²PAK (4 leads + Tab)
• Supply Voltage (min): 5.5 V
• Supply Current: 5 mA
• Maximum Power Dissipation: 96100 mW
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Device Type: High Side
• Module Configuration: High Side
• Peak Output Current: 45A
• Output Resistance: 0.016ohm
• Input Delay: 50µs
• Output Delay: 50µs
• Supply Voltage Range: 5.5V To 36V
• Driver Case Style: P2PAK
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Peak Output: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

VN920-E
3.1.2
3.2
3.3
Solution 2: diode (D
A resistor (R
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network will produce a shift (≈600mV) in the input
threshold and in the status output values if the microprocessor ground is not common to the
device ground. This shift will not vary if more than one HSD shares the same diode/resistor
network.
Series resistor in INPUT lines is also required to prevent that, during battery voltage
transient, the current exceeds the absolute maximum rating.
Safest configuration for unused INPUT pin is to leave it unconnected, while unused SENSE
pin has to be connected to ground pin.
Load dump protection
D
V
that are greater than the ones shown in the ISO T/R 7637/1 table.
MCU I/Os protection
If a ground protection network is used and negative transient are present on the V
the control pins will be pulled negative. ST suggests to insert a resistor (R
prevent the µC I/Os pins to latch-up.
The value of these resistors is a compromise between the leakage current of μC and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of μC
I/Os.
-V
Calculation example:
For V
5kΩ ≤ R
Recommended values: R
CC
ld
CCpeak
is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
max DC rating. The same applies if the device is subject to transients on the V
CCpeak
prot
/I
latchup
= - 100V and I
≤ 65kΩ.
GND
≤ R
= 1kΩ) should be inserted in parallel to D
prot
≤ (V
prot
GND
latchup
OH
=10kΩ.
Doc ID 10894 Rev 3
) in the ground line
µ
C
-V
≥ 20mA; V
IH
-V
GND
) / I
OH
µ
IHmax
C
≥ 4.5V
GND
if the device drives an
Application information
prot
) in line to
CC
CC
line,
line
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