VN920B5TR-E STMicroelectronics, VN920B5TR-E Datasheet - Page 17

IC DRIVER HIGH SIDE P2PAK

VN920B5TR-E

Manufacturer Part Number
VN920B5TR-E
Description
IC DRIVER HIGH SIDE P2PAK
Manufacturer
STMicroelectronics
Type
High Sider
Datasheets

Specifications of VN920B5TR-E

Input Type
Non-Inverting
Number Of Outputs
1
On-state Resistance
16 mOhm
Current - Output / Channel
45A
Voltage - Supply
5.5 V ~ 36 V
Operating Temperature
-40°C ~ 150°C
Mounting Type
Surface Mount
Package / Case
P²PAK (4 leads + Tab)
Supply Voltage (min)
5.5 V
Supply Current
5 mA
Maximum Power Dissipation
96100 mW
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Switch Type
High Side
Power Switch Family
VN920
Power Switch On Resistance
16mOhm
Output Current
30A
Mounting
Surface Mount
Package Type
P2PAK
Operating Temperature (min)
-40C
Operating Temperature (max)
150C
Operating Temperature Classification
Automotive
Pin Count
4 +Tab
Power Dissipation
96.1W
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Peak Output
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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VN920B5-E
3.1.2
3.2
3.3
Solution 2: diode (D
A resistor (R
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network produces a shift (≈600mV) in the input threshold
and in the status output values if the microprocessor ground is not common to the device
ground. This shift not varies if more than one HSD shares the same diode/resistor network.
Series resistor in INPUT and STATUS lines are also required to prevent that, during battery
voltage transient, the current exceeds the absolute maximum rating.
Safest configuration for unused INPUT and STATUS pin is to leave them unconnected.
Load dump protection
D
V
that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
MCU I/Os protection
If a ground protection network is used and negative transient are present on the V
the control pins are pulled negative. ST suggests to insert a resistor (R
the microcontroller I/Os pins to latch-up.
The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of
microcontroller I/Os.
-V
Calculation example:
For V
5 kΩ ≤ R
Recommended values: R
CC
ld
CCpeak
is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
max DC rating. The same applies if the device is subject to transients on the V
CCpeak
/I
prot
latchup
= -100 V and I
GND
≤ 65 kΩ.
≤ R
= 1 kΩ) should be inserted in parallel to D
prot
≤ (V
prot
GND
latchup
OH
=10 kΩ.
Doc ID 17608 Rev 1
) in the ground line
µ
C
≥ 20 mA; V
- V
IH
- V
GND
OH
) / I
µ
C
IHmax
≥ 4.5 V
GND
if the device drives an
Application information
prot
) in line to prevent
CC
CC
line,
line
17/26

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