VN820PT-E STMicroelectronics, VN820PT-E Datasheet - Page 19
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VN820PT-E
Manufacturer Part Number
VN820PT-E
Description
IC DRIVER HIGH SIDE 9A PPAK
Manufacturer
STMicroelectronics
Type
High Sider
Datasheet
1.VN820PT-E.pdf
(44 pages)
Specifications of VN820PT-E
Input Type
Non-Inverting
Number Of Outputs
1
On-state Resistance
40 mOhm
Current - Output / Channel
9A
Voltage - Supply
5.5 V ~ 36 V
Operating Temperature
-40°C ~ 150°C
Mounting Type
Surface Mount
Package / Case
PPAK (4 leads + tab)
Supply Voltage (min)
5.5 V
Supply Current
3.5 mA
Maximum Power Dissipation
65800 mW
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Maximum Turn-off Delay Time
30000 ns
Maximum Turn-on Delay Time
30000 ns
Minimum Operating Temperature
- 40 C
Number Of Drivers
1
Device Type
High Side
Module Configuration
High Side
Peak Output Current
9A
Output Resistance
0.04ohm
Input Delay
30µs
Output Delay
30µs
Supply Voltage Range
5.5V To 36V
Driver Case Style
PPAK
Rohs Compliant
Yes
Driver Configuration
Non-Inverting
Driver Type
High Side
Input Logic Level
CMOS
Operating Supply Voltage (max)
36V
Power Dissipation
65.8W
Operating Supply Voltage (min)
5.5V
Operating Supply Voltage (typ)
13V
Turn Off Delay Time
30us
Turn On Delay Time (max)
30us
Operating Temp Range
-40C to 150C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
4 +Tab
Package Type
PPAK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Peak Output
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
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VN820-E
3.1.2
3.2
3.3
3.4
Solution 2: diode (D
A resistor (R
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network produces a shift ( 600 mV) in the input threshold
and in the status output values if the microprocessor ground is not common to the device
ground. This shift not varies if more than one HSD shares the same diode/resistor network.
Series resistor in INPUT and STATUS lines are also required to prevent that, during battery
voltage transient, the current exceeds the absolute maximum rating.
Safest configuration for unused INPUT and STATUS pin is to leave them unconnected.
Load dump protection
D
V
that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
MCU I/Os protection
If a ground protection network is used and negative transient are present on the V
the control pins are pulled negative. ST suggests to insert a resistor (R
the µC I/Os pins to latch-up.
The value of these resistors is a compromise between the leakage current of C and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of C
I/Os.
-V
Calculation example:
For V
5 k
Recommended values: R
Open-load detection in off-state
Off-state open-load detection requires an external pull-up resistor (R
OUTPUT pin and a positive supply voltage (V
microprocessor.
The external resistor has to be selected according to the following requirements:
1.
2.
CC
ld
CCpeak
is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
max DC rating. The same applies if the device is subject to transients on the V
no false open-load indication when load is connected: in this case we have to avoid
V
V
no misdetection when load is disconnected: in this case the V
V
CCpeak
OUT
OUT
OLmax
R
/I
prot
latchup
= (V
to be higher than V
= - 100 V and I
; this results in the following condition R
GND
65 k .
PU
= 1k
/ (R
R
prot
L
+R
should be inserted in parallel to D
prot
PU
GND
(V
latchup
OH
)) R
=10 k .
Olmin
Doc ID 10890 Rev 6
) in the ground line
µ
C
L
-V
< V
; this results in the following condition
IH
20 mA; V
Olmin
-V
GND
.
) / I
OH
PU
IHmax
µ
) like the +5 V line used to supply the
C
PU
4.5 V
< (V
GND
PU
– V
if the device drives an
OLmax
OUT
Application information
PU
has to be higher than
prot
) connected between
) / I
) in line to prevent
L(off2)
.
CC
CC
line,
line
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