VN750SMTR-E STMicroelectronics, VN750SMTR-E Datasheet - Page 9

IC DRIVER HIGH SIDE 8-SOIC

VN750SMTR-E

Manufacturer Part Number
VN750SMTR-E
Description
IC DRIVER HIGH SIDE 8-SOIC
Manufacturer
STMicroelectronics
Type
High Sider
Datasheets

Specifications of VN750SMTR-E

Input Type
Non-Inverting
Number Of Outputs
1
On-state Resistance
55 mOhm
Current - Peak Output
6A
Voltage - Supply
5.5 V ~ 36 V
Operating Temperature
-40°C ~ 150°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Supply Voltage (min)
5.5 V
Supply Current
2 mA
Maximum Power Dissipation
4200 mW
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output / Channel
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Part Number:
VN750SMTR-E
Manufacturer:
ST
0
Figure 8. Application Schematic
GND
REVERSE BATTERY
Solution 1: Resistor in the ground line (R
can be used with any type of load.
The following is an indication on how to dimension the
R
where -I
be found in the absolute maximum rating section of the
device’s datasheet.
Power Dissipation in R
battery situations) is:
P
This resistor can be shared amongst several different
HSD. Please note that the value of this resistor should be
calculated with formula (1) where I
sum of the maximum on-state currents of the different
devices.
Please note that if the microprocessor ground is not
common with the device ground then the R
produce a shift (I
and the status output values. This shift will vary
depending on how many devices are ON in the case of
several high side drivers sharing the same R
If the calculated power dissipation leads to a large
resistor or several devices have to share the same
resistor then the ST suggests to utilize Solution 2 (see
below).
Solution 2: A diode (D
A resistor (R
D
This small signal diode can be safely shared amongst
several different HSD. Also in this case, the presence of
D
GND
GND
1) R
2) R
= (-V
resistor.
GND
GND
if the device will be driving an inductive load.
CC
GND
PROTECTION
)
+5V
2
/R
C
is the DC reverse ground pin current and can
600mV / (I
GND
GND
V
CC
S(on)max
=1k
) / (-I
GND
GND
S(on)max
GND
R
R
should be inserted in parallel to
prot
prot
* R
) in the ground line.
)
(when V
NETWORK
GND
).
+5V
) in the input thresholds
S(on)max
CC
<0: during reverse
STATUS
INPUT
GND
becomes the
GND
AGAINST
only). This
GND
.
will
V
GND
the ground network will produce a shift (j600mV) in the
input threshold and the status output values if the
microprocessor ground is not common with the device
ground. This shift will not vary if more than one HSD
shares the same diode/resistor network.
Series resistor in INPUT and STATUS lines are also
required to prevent that, during battery voltage transient,
the current exceeds the Absolute Maximum Rating.
Safest configuration for unused INPUT and STATUS pin
is to leave them unconnected.
LOAD DUMP PROTECTION
D
load dump peak voltage exceeds V
The same applies if the device will be subject to
transients on the V
shown in the ISO T/R 7637/1 table.
If a ground protection network is used and negative
transients are present on the V
be pulled negative. ST suggests to insert a resistor (R
in line to prevent the C I/Os pins to latch-up.
The value of these resistors is a compromise between the
leakage current of
HSD I/Os (Input levels compatibility) with the latch-up
limit of C I/Os.
Calculation example:
For V
5k
Recommended R
C I/Os PROTECTION:
ld
-V
is necessary (Voltage Transient Suppressor) if the
CCpeak
R
GND
CCpeak
GND
R
prot
/I
latchup
= - 100V and I
V
65k .
CC
D
prot
GND
CC
R
C and the current required by the
value is 10k
prot
OUTPUT
line that are greater than the ones
latchup
(V
OH C
CC
line, the control pins will
-V
20mA; V
IH
CC
-V
VN750SM-E
max DC rating.
GND
OH C
) / I
D
ld
IHmax
4.5V
9/20
prot
)

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