TLE8104E Infineon Technologies, TLE8104E Datasheet - Page 9

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TLE8104E

Manufacturer Part Number
TLE8104E
Description
IC SWITCH LOSIDE 4CH DSO-20
Manufacturer
Infineon Technologies
Type
Low Sider
Datasheet

Specifications of TLE8104E

Input Type
SPI
Number Of Outputs
4
On-state Resistance
320 mOhm
Current - Output / Channel
1A
Current - Peak Output
3A
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 150°C
Mounting Type
Surface Mount
Package / Case
DSO-20
Packages
PG-DSO-20
Thermal Class
Exposed Pad
Id Nom
4 x 1 A
Pin Count
20.0 Pins
Channels
4.0
Comment
inductive and resistive loads (e.g. injectors)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
SP000272317
TLE8104E
TLE8104ETR

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5
5.1
The TLE8104E is supplied by power supply line V
including the gate control of the power stages. A capacitor between pins VS to GND is recommended.
A RESET pin is available. When a low level is applied to this pin, the device enters sleep mode. In this case, all
registers are set to their default values and the quiescent supply current is minimized.
After start-up of the power supply, the RESET pin should be kept low until the Reset Duration Time has expired,
reseting all SPI registers to their default values.
Electrical Characteristics: Power Supply
V
all voltages with respect to ground, positive current flowing into pin
Pos.
5.1.1
5.1.2
5.1.3
5.1.4
5.1.5
5.1.6
1) For proper startup, after the supply V
5.2
Each input signal controls the output stages of its assigned channel. For example, IN1 controls OUT1, IN2 controls
OUT2, etc. Please refer to
The PRG pin selects if the input pins are active high or active low and activates either a pull-down or pull-up current
source. If PRG is high, the input pins are active high and the pull-down current source is active. If PRG is low, the
input pins are active low and the pull-up current source is active. The respective current sources at the input pin
ensure that the channels switch off in case of an unconnected pin. The zener diode protects the input circuit
against ESD pulses.
The BOL bit can be set via SPI. This bit determines if a Boolean OR or AND operation is performed on the INn
signals and their corresponding data bits CHn
an OR operation.
Data Sheet
S
= 4.5 V to 5.5 V,
duration time has expired.
Parameter
Supply Voltage
Supply Current
Input Low Voltage of pin RESET
Input High Voltage of pin RESET
High Input Pull-up Current
through pin RESET
Reset duration time
Electrical and Functional Description of Blocks
Power Supply
Parallel Inputs
T
j
= -40 °C to +150 °C, (unless otherwise specified)
Figure 4
1)
for details.
S
has reached its final voltage, the RESET pin should be held low until the reset
IN
Symbol
V
I
V
V
I
t
RESET(L)
S(ON)
RESET(L)
. The default setting of the BOL bit programs the device to perform
S
RESET(L)
RESET(H)
S
, used for the digital as well as the analog functions of the device
9
Min.
4.5
-0.3
2.0
-100
10
Smart Quad Channel Powertrain Switch
Electrical and Functional Description of Blocks
Limit Values
Typ.
1
-50
Max.
5.5
2
1.0
V
-20
S
+0.3 V
Unit
V
mA
V
µA
µs
Conditions
all channels ON
V
RESET
V1.4, 2010-04-26
= 2 V,
TLE8104E

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