ISL6209CBZ Intersil, ISL6209CBZ Datasheet
ISL6209CBZ
Specifications of ISL6209CBZ
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ISL6209CBZ Summary of contents
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... Copyright © Intersil Americas Inc. 2004, 2005, 2007. All Rights Reserved. Intel® registered trademark of Intel Corporation. ISL6209 FN9132.2 TEMP. PART RANGE MARKING (°C) PACKAGE ISL6209CB -10 to +100 8 Ld SOIC ISL6209CBZ -10 to +100 8 Ld SOIC (Pb-free) 209C -10 to +100 8 Ld 3x3 QFN Intersil (and design registered trademark of Intersil Americas Inc. PKG. DWG. # M8.15 M8.15 L8.3x3 ...
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Pinouts ISL6209 (8 LD SOIC) TOP VIEW UGATE 1 BOOT 2 PWM 3 GND 4 ISL6209 Block Diagram VCC DELAY PWM Timing Diagram t PWM PDHU t PDLU t RU UGATE LGATE PDLL 2 ISL6209 8 ...
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Typical Application - Two Phase Converter Using ISL6209 Gate Drivers +5V +5V FB COMP VCC VSEN PWM1 PWM2 PGOOD MAIN CONTROL ISEN1 VID ISEN2 FS DACOUT GND 3 ISL6209 V BAT +5V VCC BOOT UGATE PWM PHASE DRIVE ISL6209 DELAY ...
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Absolute Maximum Ratings Supply Voltage (VCC -0. Input Voltage ( ...
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Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted. (Continued) PARAMETER LGATE Turn-On Propagation Delay OUTPUT Upper Drive Source Resistance Upper Driver Source Current (Note 5) Upper Drive Sink Resistance Upper Driver Sink Current (Note 5) Lower Drive Source Resistance Lower ...
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... MOSFET and prevent a shoot through caused by the high dv/dt of the phase node. Three-State PWM Input A unique feature of the ISL6209 and other Intersil drivers is the addition of a shutdown window to the PWM input. If the PWM signal enters and remains within the shutdown window for a set holdoff time, the output drivers are disabled and both MOSFET gates are pulled and held low ...
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The equation governing the dead-time seen in Figure 4 is expressed as: – × ) × 160 DELAY DELAY The equation can be rewritten to solve for R follows ...
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... FET and power ground wide and short. 5. Input capacitors should be placed as close to the DRAIN of the upper FET and the SOURCE of the lower FET as thermally possible. NOTE: Refer to Intersil Tech Brief TB447 for more information. 8 ISL6209 Thermal Management For maximum thermal performance in high current, high ...
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Package Outline Drawing L8.3x3 8 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 2, 3/07 3.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW ( 2. 60 TYP ) ( TYPICAL RECOMMENDED LAND PATTERN 9 ISL6209 A ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...