ISL6209 INTERSIL [Intersil Corporation], ISL6209 Datasheet
ISL6209
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ISL6209 Summary of contents
Page 1
... Multi-Phase Buck PWM controller, such as ISL6216, ISL6244, and ISL6247, forms a complete single-stage core-voltage regulator solution for advanced mobile microprocessors. The ISL6209 features 4A typical sink current for the lower gate driver. The 4A typical sink current is capable of holding the lower MOSFET gate during the PHASE node rising edge to prevent the shoot-through power loss caused by the high dv/dt of the PHASE node ...
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... Pinouts ISL6209 (SOIC) TOP VIEW UGATE 1 BOOT 2 PWM 3 GND 4 ISL6209 Block Diagram VCC DELAY PWM 2 ISL6209 8 PHASE 7 DELAY 6 VCC 5 LGATE SHOOT- THROUGH PROTECTION CONTROL LOGIC 10K THERMAL PAD (FOR QFN PACKAGE ONLY) FIGURE 1. BLOCK DIAGRAM ISL6209 (QFN) TOP VIEW DELAY ...
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... Typical Application - Two Phase Converter Using ISL6209 Gate Drivers +5V +5V FB COMP VCC VSEN PWM1 PWM2 PGOOD MAIN CONTROL ISEN1 VID ISEN2 FS DACOUT GND 3 ISL6209 V BAT +5V VCC BOOT UGATE PWM PHASE DRIVE ISL6209 DELAY LGATE V BAT +5V VCC BOOT UGATE PWM PHASE DRIVE ...
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... LGATE Fall Time UGATE Turn-Off Propagation Delay LGATE Turn-Off Propagation Delay UGATE Turn-On Propagation Delay LGATE Turn-On Propagation Delay 4 ISL6209 Thermal Information Thermal Resistance (Typical Notes θ SOIC Package (Note 0.3V QFN Package (Notes 3, 4 ...
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... DELAY (Pin 7 for SOIC-8, Pin 6 for QFN) The DELAY pin sets the dead-time between gate switching for the ISL6209. Connect a resistor to GND from this pin to adjust the dead-time, refer to Figure 5. Tie this pin to VCC to disable the delay circuitry. See Shoot-Through Protection section for more detail ...
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... MOSFET and prevent a shoot through caused by the high dv/dt of the phase node. Three-State PWM Input A unique feature of the ISL6209 and other Intersil drivers is the addition of a shutdown window to the PWM input. If the PWM signal enters and remains within the shutdown window for a set holdoff time, the output drivers are disabled and both MOSFET gates are pulled and held low ...
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... Simply adding an external capacitor across the BOOT and PHASE pins completes the bootstrap circuit. The bootstrap capacitor must have a maximum voltage rating above the maximum battery voltage plus 5V. The 7 ISL6209 GATE A GATE B 1V bootstrap capacitor can be chosen from the following equation: ...
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... L and Q is the upper and lower gate charge determined by L MOSFET selection and any external capacitance added to the gate pins. The I V product is the quiescent power VCC CC of the driver and is typically negligible. 8 ISL6209 1000 Q U 900 =100nC U 800 Q = 200nC ...
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... Quad Flat No-Lead Plastic Package (QFN) Micro Lead Frame Plastic Package (MLFP) 9 ISL6209 L8.3x3 8 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE (COMPLIANT TO JEDEC MO-220VEEC ISSUE C) MILLIMETERS SYMBOL MIN NOMINAL A 0. 0.23 D 3.00 BSC D1 2.75 BSC D2 0.25 E 3.00 BSC E1 2.75 BSC E2 0. 0. θ ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 10 ISL6209 M8.15 (JEDEC MS-012-AA ISSUE C) 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC ...