LM5111-2MYX/NOPB National Semiconductor, LM5111-2MYX/NOPB Datasheet - Page 8
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LM5111-2MYX/NOPB
Manufacturer Part Number
LM5111-2MYX/NOPB
Description
IC MOSFET DRIVER DUAL 5A 8-MSOP
Manufacturer
National Semiconductor
Datasheet
1.LM5111-1MYNOPB.pdf
(12 pages)
Specifications of LM5111-2MYX/NOPB
Configuration
Low-Side
Input Type
Inverting
Delay Time
25ns
Current - Peak
5A
Number Of Configurations
2
Number Of Outputs
2
Voltage - Supply
3.5 V ~ 14 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-MSOP Exposed Pad, 8-HMSOP, 8-eMSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
High Side Voltage - Max (bootstrap)
-
Other names
LM5111-2MYX
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LM5111-2MYX/NOPB
Manufacturer:
NS/TI
Quantity:
68
www.national.com
Detailed Operating Description
LM5111 dual gate driver consists of two independent and
identical driver channels with TTL compatible logic inputs and
high current totem-pole outputs that source or sink current to
drive MOSFET gates. The driver output consist of a com-
pound structure with MOS and bipolar transistor operating in
parallel to optimize current capability over a wide output volt-
age and operating temperature range. The bipolar device
provides high peak current at the critical threshold region of
the MOSFET VGS while the MOS devices provide rail-to-rail
output swing. The totem pole output drives the MOSFET gate
between the gate drive supply voltage V
ground potential at the V
The control inputs of the drivers are high impedance CMOS
buffers with TTL compatible threshold voltages. The LM5111
pinout was designed for compatibility with industry standard
gate drivers in single supply gate driver applications.
The input stage of each driver should be driven by a signal
with a short rise and fall time. Slow rising and falling input
signals, although not harmful to the driver, may result in the
output switching repeatedly at a high frequency.
The two driver channels of the LM5111 are designed as iden-
tical cells. Transistor matching inherent to integrated circuit
manufacturing ensures that the AC and DC peformance of the
channels are nearly identical. Closely matched propagation
delays allow the dual driver to be operated as a single with
inputs and output pins connected. The drive current capability
in parallel operation is precisely 2X the drive of an individual
channel. Small differences in switching speed between the
driver channels will produce a transient current (shoot-
through) in the output stage when two output pins are con-
nected to drive a single load. Differences in input thresholds
between the driver channels will also produce a transient cur-
rent (shoot-through) in the output stage. Fast transition input
signals are especially important while operating in a parallel
configuration. The efficiency loss for parallel operation has
been characterized at various loads, supply voltages and op-
erating frequencies. The power dissipation in the LM5111
increases be less than 1% relative to the dual driver configu-
ration when operated as a single driver with inputs/ outputs
connected.
An Under Voltage Lock Out (UVLO) circuit is included in the
LM5111 , which senses the voltage difference between V
and the chip ground pin, V
difference falls below 2.8V both driver channels are disabled.
The UVLO hysteresis prevents chattering during brown-out
conditions and the driver will resume normal operation when
the V
3.0V.
The LM5111-1, -2 and -3 devices hold both outputs in the low
state in the under-voltage lockout (UVLO) condition. The
LM5111-4 is distinguished from the LM5111-3 by the active
high output state of OUT_A during UVLO. When VCC is less
than the UVLO threshold voltage, OUT_A of the LM5111-4
will be locked in the high state while OUT_B will be disabled
in the low state. This configuration allows the LM5111-4 to
drive a PFET through OUT_A and an NFET through OUT_B
with both FETs safely turned off during UVLO.
The LM5111 is available in dual non-inverting (-1), dual In-
verting (-2) and the combination inverting plus non-inverting
(-3, -4) configurations. All configurations are offered in the
SOIC-8 and MSOP8-EP plastic packages.
CC
to V
EE
differential voltage exceeds approximately
EE
EE
pin.
. When the V
CC
CC
and the power
to V
EE
voltage
CC
8
Layout Considerations
Attention must be given to board layout when using LM5111.
Some important considerations include:
1.
2.
3.
4.
5.
Thermal Performance
INTRODUCTION
The primary goal of thermal management is to maintain the
integrated circuit (IC) junction temperature (T
ified maximum operating temperature to ensure reliability. It
is essential to estimate the maximum T
worst case operating conditions. The junction temperature is
estimated based on the power dissipated in the IC and the
junction to ambient thermal resistance θ
in the application board and environment. The θ
given constant for the package and depends on the printed
circuit board design and the operating environment.
DRIVE POWER REQUIREMENT CALCULATIONS IN
LM5111
The LM5111 dual low side MOSFET driver is capable of
sourcing/sinking 3A/5A peak currents for short intervals to
drive a MOSFET without exceeding package power dissipa-
tion limits. High peak currents are required to switch the
MOSFET gate very quickly for operation at high frequencies.
A Low ESR/ESL capacitor must be connected close to
the IC and between the V
peak currents being drawn from V
MOSFET.
Proper grounding is crucial. The drivers need a very low
impedance path for current return to ground avoiding
inductive loops. The two paths for returning current to
ground are a) between LM5111 V
of the circuit that controls the driver inputs, b) between
LM5111 V
being driven. All these paths should be as short as
possible to reduce inductance and be as wide as possible
to reduce resistance. All these ground paths should be
kept distinctly separate to avoid coupling between the
high current output paths and the logic signals that drive
the LM5111. A good method is to dedicate one copper
plane in a multi-layered PCB to provide a common
ground surface.
With the rise and fall times in the range of 10 ns to 30 ns,
care is required to minimize the lengths of current
carrying conductors to reduce their inductance and EMI
from the high di/dt transients generated by the LM5111.
The LM5111 footprint is compatible with other industry
standard drivers including the TC4426/27/28 and
UCC27323/4/5.
If either channel is not being used, the respective input
pin (IN_A or IN_B) should be connected to either V
V
CC
to avoid spurious output signals.
EE
pin and the source of the power MOSFET
CC
and V
CC
EE
EE
J
JA
of IC components in
during turn-on of the
pins to support high
pin and the ground
for the IC package
J
) below a spec-
JA
is not a
EE
or