L6388ED STMicroelectronics, L6388ED Datasheet - Page 8

IC DRIVER HI/LO SIDE HV 8-SOIC

L6388ED

Manufacturer Part Number
L6388ED
Description
IC DRIVER HI/LO SIDE HV 8-SOIC
Manufacturer
STMicroelectronics
Type
High Side/Low Sider
Datasheets

Specifications of L6388ED

Configuration
High and Low Side, Synchronous
Input Type
Non-Inverting
Delay Time
225ns
Current - Peak
400mA
Number Of Configurations
1
Number Of Outputs
2
High Side Voltage - Max (bootstrap)
600V
Voltage - Supply
17V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Product
Half-Bridge Drivers
Rise Time
100 ns
Fall Time
80 ns
Maximum Power Dissipation
750 mW
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Bridge Type
Half Bridge
Minimum Operating Temperature
- 45 C
Number Of Drivers
2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Input logic
5
6
6.1
8/18
Input logic
Input logic is provided with an interlocking circuitry which avoids the two outputs (LVG, HVG)
to be active at the same time when both the logic input pins (LIN, HIN) are at a high logic
level. In addition, to prevent cross conduction of the external MOSFETs, after each output is
turned-off the other output cannot be turned-on before a certain amount of time (DT)
(see
Bootstrap driver
A bootstrap circuitry is needed to supply the high voltage section. This function is normally
accomplished by a high voltage fast recovery diode
integrated structure replaces the external diode. It is realized by a high voltage DMOS,
driven synchronously with the low side driver (LVG), with in series a diode, as shown in
Figure 5
diode connected in series to the DMOS has been added to avoid undesirable turn on of it.
C
To choose the proper C
capacitor. This capacitor C
The ratio between the capacitors C
It has to be:
e.g.: if Q
300mV.
If HVG has to be supplied for a long time, the C
the leakage losses.
e.g.: HVG steady state consumption is lower than 200µA, so if HVG T
to supply 1µC to C
The internal bootstrap driver gives great advantages: the external fast recovery diode can
be avoided (it usually has great leakage current).
This structure can work only if V
LVG is on. The charging time (T
fulfilled and it has to be long enough to charge the capacitor.
The bootstrap driver introduces a voltage drop due to the DMOS R
Ω). At low frequency this drop can be neglected. Anyway increasing the frequency it must be
taken in to account.
BOOT
Figure
gate
b. An internal charge pump
selection and charging
3).
is 30nC and V
EXT
. This charge on a 1µF capacitor means a voltage drop of 1V.
BOOT
EXT
gate
value the external MOS can be seen as an equivalent
is related to the MOS total gate charge:
is 10V, C
charge
OUT
EXT
is close to GND (or lower) and in the meanwhile the
(Figure 5
) of the C
and C
C
EXT
C
EXT
BOOT
is 3nF. With C
BOOT
>>>C
=
b) provides the DMOS driving voltage. The
BOOT
Q
-------------- -
V
BOOT
gate
gate
EXT
is proportional to the cyclical voltage loss.
(Figure 5
is the time in which both conditions are
selection has to take into account also
BOOT
a). In the L6388E a patented
= 100nF the drop would be
DSON
ON
(typical value: 125
is 5ms, C
BOOT
L6388E
has

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