L6743D STMicroelectronics, L6743D Datasheet - Page 11

• Manufacturer Part Number: L6743D
• Description: IC MOSFET DRIVER DUAL 8SOIC
• Manufacturer: STMicroelectronics
• Type: High Current Mosfet Driverr

Specifications of L6743D

• Configuration: High and Low Side, Synchronous
• Input Type: PWM
• Delay Time: 30ns
• Current - Peak: 2A
• Number Of Configurations: 1
• Number Of Outputs: 2
• High Side Voltage - Max (bootstrap): 41V
• Voltage - Supply: 5 V ~ 12 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Product: Driver ICs - Various
• Propagation Delay Time: 75 ns
• Supply Voltage (max): 12 V
• Supply Voltage (min): 5 V
• Supply Current: 5 mA
• Maximum Power Dissipation: 1.15 W
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Number Of Drivers: 2
• Output Voltage: 10 V
• Flexible Gate-drive: 5 V to 12 V compatible
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

L6743D
4.5
Referring to
stage with two different MOSFETs: P-MOSFET to drive the external gate high and N-
MOSFET to drive the external gate low (with their own R
R
(C
MOSFET to reach the driving voltage (PVCC for HS and VCC for LS). This capacitance is
charged and discharged at the driver switching frequency F
The total power Psw is dissipated among the resistive components distributed along the
driving path. According to the external Gate resistance and the power-MOSFET intrinsic
gate resistance, the driver dissipates only a portion of Psw as follow:
The total power dissipated from the driver can then be determined as follow:
Figure 6.
Layout guidelines
L6743D provides driving capability to implement high-current step-down DC-DC converters.
The first priority when placing components for these applications has to be reserved to the
power section, minimizing the length of each connection and loop as much as possible. To
minimize noise and voltage spikes (also EMI and losses) power connections must be a part
of a power plane and anyway realized by wide and thick copper traces: loop must be anyway
minimized. The critical components, such as the power MOSFETs, must be close one to the
other. However, some space between the power MOSFET is still required to assure good
thermal cooling and airflow.
Traces between the driver and the MOSFETS should be short and wide to minimize the
inductance of the trace so minimizing ringing in the driving signals. Moreover, VIAs count
needs to be minimized to reduce the related parasitic effect.
P
P
P
lo_LS
SW HS
SW LS
G_HS
=
LS DRIVER
–
–
P
DC
). The external power MOSFET can be represented in this case as a capacitance
, C
=
+
=
G_LS
LGATE
P
1
-- - C
2
GND
VCC
1
-- - C
2
SW HS
Figure
⋅
Equivalent circuit for MOSFET drive
⋅
) that stores the gate-charge (Q
–
GLS
GHS
R
GATELS
+
6, classical MOSFET driver can be represented by a push-pull output
⋅
⋅
VCC
PVCC
P
LS MOSFET
SW LS
2
–
R
⋅
2
ILS
C
Fsw
⋅
GLS
Fsw
⋅
⎛
⎝
⋅
------------------------------------------------------------- -
R
⎛
⎝
hiLS
--------------------------------------------------------------- -
R
hiHS
+
R
+
R
GateLS
R
hiLS
R
GateHS
hiHS
G_HS
+
R
, Q
+
iLS
R
G_LS
iHS
+
Device description and operation
dsON
HS DRIVER
------------------------------------------------------------- -
R
+
loLS
) required by the external power
SW
--------------------------------------------------------------- -
R
: R
loHS
.
+
HGATE
PHASE
hi_HS,
BOOT
R
VCC
R
+
GateLS
loLS
R
R
GateHS
loHS
R
lo_HS
R
+
GATEHS
R
iLS
+
, R
HS MOSFET
R
⎞
⎠
iHS
hi_LS,
C
R
GHS
IHS
⎞
⎠
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