HCPL-316J Avago Technologies US Inc., HCPL-316J Datasheet - Page 22

• Manufacturer Part Number: HCPL-316J
• Description: OPTOCOUPLER GATE DRV 2A 16-SOIC
• Manufacturer: Avago Technologies US Inc.

Specifications of HCPL-316J

• Configuration: High-Side
• Input Type: Differential
• Delay Time: 300ns
• Current - Peak: 2.5A
• Number Of Configurations: 1
• Number Of Outputs: 1
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• No. Of Channels: 1
• Isolation Voltage: 3.75kV
• Optocoupler Output Type: Gate Drive
• Input Current: 22mA
• Output Voltage: 30V
• Opto Case Style: SOIC
• No. Of Pins: 16
• Propagation Delay Low-high: 0.5µs
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• High Side Voltage - Max (bootstrap): -
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant, Contains lead / RoHS non-compliant
• Other names: 516-1130-5

Figure 62. Recommended application circuit.
Description of Operation/Timing
Figure 63 below illustrates input and output waveforms
under the conditions of normal operation, a desat fault
condition, and normal reset behavior.
Normal Operation
During normal operation, V
trolled by either V
emitter voltage being monitored through D
FAULT output is high and the RESET input should be held
high. See Figure 63.
NON-INVERTING
Figure 63. Timing diagram.
22
CONFIGURED
CONFIGURED
330 pF
μC
INVERTING
INPUTS
INPUTS
5 V
3.3
k Ω
+
–
V
V
V
V
V
V
FAULT
RESET
0.1
μF
IN-
IN+
IN-
IN+
DESAT
OUT
IN+
OPERATION
NORMAL
0 V
5 V
5 V
5 V
or V
1
2
3
4
5
6
7
8
IN-
V
V
V
GND1
RESET
FAULT
V
V
IN+
IN-
CC1
LED1+
LED1-
OUT
, with the IGBT collector-to-
of the HCPL-316J is con-
HCPL-316J
7 V
DESAT
CONDITION
V
DESAT
LED2+
V
V
FAULT
OUT
CC2
V
V
V
V
EE
EE
C
E
. The
16
15
14
13
12
11
10
9
0.1
μF
Fault Condition
When the voltage on the DESAT pin exceeds 7 V while
the IGBT is on, V
“softly” turn-off the IGBT and prevent large di/dt induced
voltages. Also activated is an internal feedback channel
which brings the FAULT output low for the purpose of
notifying the micro-controller of the fault condition. See
Figure 63.
Reset
The FAULT output remains low until RESET is brought
low. See Figure 63. While asserting the RESET pin (LOW),
the input pins must be asserted for an output low state
(V
either by software control (i.e. of the microcontroller) or
hardware control (see Figures 73 and 74).
k Ω
IN+
47
0.1
μF
is LOW or V
100 pF
RESET
0.1
μF
100 Ω
+
–
+
–
V
V
IN-
CC2
OUT
D
EE
+
DESAT
V
= -5 V
is HIGH). This may be accomplished
= 18 V
F
R
–
is slowly brought low in order to
g
Q1
Q2
+
–
+
–
V
V
3-PHASE
OUTPUT
CE
CE