LTC3900ES8#PBF Linear Technology, LTC3900ES8#PBF Datasheet - Page 9
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LTC3900ES8#PBF
Manufacturer Part Number
LTC3900ES8#PBF
Description
IC DRIVER RECT SYNC CONV 8SOIC
Manufacturer
Linear Technology
Datasheet
1.LTC3900ES8.pdf
(20 pages)
Specifications of LTC3900ES8#PBF
Configuration
High-Side
Input Type
Inverting and Non-Inverting
Delay Time
60ns
Current - Peak
2A
Number Of Configurations
2
Number Of Outputs
2
Voltage - Supply
4.5 V ~ 11 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
High Side Voltage - Max (bootstrap)
-
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APPLICATIONS INFORMATION
time. The current sinking capability of the circuit is around
1mA. The timeout function can be disabled by connecting
the timer pin to GND.
Current Sense
The differential input current sense comparator is used
for sensing the voltage across the drain-to-source termi-
nals of Q4 through the CS
current reverses into the Q4 causing CS
CS
comparator is used to prevent inductor reverse current
buildup during power down or Burst Mode operation, which
may cause damage to the MOSFET. The 10.5mV input
threshold has a positive temperature coeffi cient, which
closely matches the TC of the external MOSFET R
The current sense comparator is only active 250ns after
CG goes high; this is to avoid any ringing immediately
after Q4 is switched on.
Under light load conditions, if the inductor average cur-
rent is less than half of its peak-to-peak ripple current,
the inductor current will reverse into Q4 during a portion
of the switching cycle, forcing CS
The current sense comparator input threshold is set at
–
by more than 10.5mV, the LTC3900 pulls CG low. This
Figure 5. Timer Waveforms with Incorrect SYNC Pulses
TIMER RESET
(INTERNAL)
TIMER
SYNC
THRESHOLD
FG
CG
MISSING/LOW
TIMEOUT
SYNC PULSE
POSITIVE
TIMEOUT
TIMER DO NOT RESET
AT SECOND NEGATIVE
SYNC PULSE
+
and CS
–
+
pins. If the inductor
to rise above CS
TIMER RESET AFTER
RECEIVING POSITIVE
SYNC PULSE
+
to rise above
3900 F05
DS(ON)
–
.
.
10.5mV to prevent tripping under light load conditions.
If the product of the inductor negative peak current and
MOSFET R
operate in discontinuous current mode. Figure 6 shows
the LTC3900 operating in discontinuous current mode;
the CG output goes low before the next negative SYNC
pulse, as soon as the inductor current becomes negative.
Discontinuous current mode is sometimes undesirable.
To disable discontinuous current mode operation, add a
resistor divider, R
the 10.5mV threshold so that the LTC3900 operates in
continuous mode at no load.
The LTC3900 CS
clamp circuit (Z
pin to 11V. The clamp circuit is to be used together with
the external series resistor, R
from high Q4 drain voltage in the power transfer cycle.
During the power transfer cycle, Q4 is off, the drain volt-
age of Q4 is determined by the primary input voltage and
the transformer turns ratio. This voltage can be high and
may damage the LTC3900 if CS
the drain of Q4. The current sinking capability of the clamp
circuit is 5mA minimum.
Figure 6a. Discontinuous Current Mode Operation at No Load
INDUCTOR
CURRENT
SYNC
SG
CG
FG
DS(ON)
CS
is higher than 10.5mV, the LTC3900 will
CS1
+
in the Block Diagram) that clamps the
pin has an internal current sinking
and R
COMPARATOR TRIP
CURRENT SENSE
CS2
CS1
at the CS
+
is connected directly to
to protect the CS
LTC3900
+
pin to increase
3900 F06a
0A
+
3900fa
9
pin