ISL97674IRZ Intersil, ISL97674IRZ Datasheet - Page 23

• Manufacturer Part Number: ISL97674IRZ
• Description: IC LED DVR PWM CTRL 6CH 20QFN
• Manufacturer: Intersil

Specifications of ISL97674IRZ

• Topology: PWM, Step-Up (Boost)
• Number Of Outputs: 6
• Internal Driver: Yes
• Type - Primary: Automotive, Backlight
• Type - Secondary: RGB, White LED
• Frequency: 600kHz, 1.2MHz
• Voltage - Supply: 4.5 V ~ 26.5 V
• Voltage - Output: *
• Mounting Type: Surface Mount
• Package / Case: 20-VFQFN Exposed Pad
• Operating Temperature: -40°C ~ 85°C
• Current - Output / Channel: 40mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Bit 7 (R/W) Bit 6 (R/W) Bit 5 (R/W) Bit 4 (R/W) Bit 3 (R/W) Bit 2 (R/W) Bit 1 (R/W) Bit 0 (R/W)
Bit 7 (R/W)
Reserved
EqualPhase
REGISTER 0x08
REGISTER 0x0A
DsblPLL
REGISTER 0x09
Bit 7 (R/W)
BIT ASSIGNMENT
BIT ASSIGNMENT
BIT ASSIGNMENT
PhaseShift[6..0]
BstSlewRate[1:0]
EqualPhase
DirectPWM
PWMtoDC
VSC[1..0]
CH[5..0]
DsblPLL
FSW
Reserved
DirectPWM
Bit 6 (R/W)
PhaseShift6
Bit 6 (R/W)
PHASE SHIFT CONTROL REGISTER
CONFIGURATION REGISTER
OUTPUT CHANNEL REGISTER
FIGURE 37. DESCRIPTIONS OF PHASE SHIFT CONTROL REGISTER
23
Bit 5 (R/W)
PWMtoDC
When 1, PLL is disabled and PWM frequency is set by resistor to ground on PLLC pin.
Forces the PWMI signal to directly control the current sources. Note that there is some
synchronous delay between PWMI and current sources.
Switches current sources on and varies DC level rather than PWMing.
Controls strength of FET driver. 00 - 25% drive strength, 01 - 50% drive strength,
10%-75% drive strength, 11 - 100% drive strength.
2 levels of Switching Frequencies (0 = 1,200kHz, 1 = 600kHz)
3 levels of Short-Circuit Thresholds (0 = disabled, 1 = 3.6V, 2 = 4.8V, 3 = 5.8V)
Controls phase shift mode - When 0, phase shift is defined by PhaseShift<6:0>. When 1,
CH5 = Channel 5, CH4 = Channel 4 and so
CH5
FIGURE 36. DESCRIPTIONS OF OUTPUT CHANNEL REGISTER
Note that user must not specify a value that gives >360deg shift between first and last
In direct PWM modes, phase shift between each channel is PhaseShift<6:0>/12.8MHz
FIGURE 35. DESCRIPTIONS OF CONFIGURATION REGISTER
PhaseShift5
Bit 5 (R/W)
BIT FIELD DEFINITIONS
phase shift is 360/N (where N is the number of channels enabled).
BstSlewRate1
7-bit Phase shift setting - phase shift between each channel is
CH4
Bit 4 (R/W)
PhaseShift4
Bit 4 (R/W)
on
CH3
ISL97674
PhaseShift<6:0>/(255*PWMFreq)
BIT FIELD DEFINITIONS
BIT FIELD DEFINITIONS
BstSlewRate0
Bit 3 (R/W)
PhaseShift3
Bit 3 (R/W)
CH2
channels.
Bit 2 (R/W)
PhaseShift2
CH1
FSW
Bit 2 (R/W)
Bit 1 (R/W)
CH0
VSC1
PhaseShift1
Bit 1 (R/W)
Bit 0 (R/W)
VSC0
PhaseShift0
Bit 0 (R/W)
June 25, 2010
FN7634.0