PCA9634PW/S910,118 NXP Semiconductors, PCA9634PW/S910,118 Datasheet - Page 13
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PCA9634PW/S910,118
Manufacturer Part Number
PCA9634PW/S910,118
Description
IC LED DRIVER RGBA 20-TSSOP
Manufacturer
NXP Semiconductors
Type
RGBA LED Driverr
Datasheet
1.PCA9634D118.pdf
(38 pages)
Specifications of PCA9634PW/S910,118
Topology
Open Drain, PWM
Number Of Outputs
8
Internal Driver
Yes
Type - Primary
Backlight, LED Blinker
Type - Secondary
RGBA
Frequency
1MHz
Voltage - Supply
2.3 V ~ 5.5 V
Voltage - Output
5.5V
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Operating Temperature
-40°C ~ 85°C
Current - Output / Channel
25mA
Internal Switch(s)
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Efficiency
-
Other names
935283055118
PCA9634PW/S910-T
PCA9634PW/S910-T
PCA9634PW/S910-T
PCA9634PW/S910-T
NXP Semiconductors
PCA9634_6
Product data sheet
7.3.4 GRPPWM: Group duty cycle control
7.3.5 GRPFREQ: Group frequency
Table 8.
Legend: * default value.
When DMBLNK bit (MODE2 register) is programmed with 0, a 190 Hz fixed frequency
signal is superimposed with the 97 kHz individual brightness control signal. GRPPWM is
then used as a global brightness control allowing the LED outputs to be dimmed with the
same value. The value in GRPFREQ is then a ‘Don’t care’.
General brightness for the 8 outputs is controlled through 256 linear steps from 00h
(0 % duty cycle = LED output off) to FFh (99.6 % duty cycle = maximum brightness).
Applicable to LED outputs programmed with LDRx = 11 (LEDOUT0 and LEDOUT1
registers).
When DMBLNK bit is programmed with logic 1, GRPPWM and GRPFREQ registers
define a global blinking pattern, where GRPFREQ contains the blinking period (from
24 Hz to 10.73 s) and GRPPWM the duty cycle (ON/OFF ratio in %).
Table 9.
Legend: * default value.
GRPFREQ is used to program the global blinking period when DMBLNK bit (MODE2
register) is equal to 1. Value in this register is a ‘Don’t care’ when DMBLNK = 0.
Applicable to LED outputs programmed with LDRx = 11 (LEDOUT0 and LEDOUT1
registers).
Blinking period is controlled through 256 linear steps from 00h (41 ms, frequency 24 Hz)
to FFh (10.73 s).
duty cycle
global blinking period
Address
0Ah
Address
0Bh
GRPPWM - Group duty cycle control register (address 0Ah) bit description
Register
GRPPWM
GRPFREQ - Group Frequency register (address 0Bh) bit description
Register
GRPFREQ
=
GDC 7:0
-------------------------- -
256
Rev. 06 — 12 September 2008
Bit
7:0
Bit
7:0
=
GFRQ 7:0
--------------------------------------- - in
Symbol
GDC[7:0]
Symbol
GFRQ[7:0]
24
+
1
Access Value
R/W
Access Value
R/W
sec
onds
1111 1111
0000 0000* GRPFREQ register
8-bit Fm+ I
Description
GRPPWM register
Description
PCA9634
2
© NXP B.V. 2008. All rights reserved.
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