LT3743IUFD#PBF Linear Technology, LT3743IUFD#PBF Datasheet - Page 14

• Manufacturer Part Number: LT3743IUFD#PBF
• Description: IC LED DRVR HP CONST CURR 28QFN
• Manufacturer: Linear Technology
• Type: High Power, Constant Currentr

Specifications of LT3743IUFD#PBF

• Topology: High Side, Low Side, PWM, Step-Down (Buck)
• Number Of Outputs: 1
• Internal Driver: No
• Type - Primary: General Purpose
• Type - Secondary: RGB
• Frequency: 200kHz ~ 1MHz
• Voltage - Supply: 6 V ~ 36 V
• Mounting Type: Surface Mount
• Package / Case: 28-QFN
• Operating Temperature: -40°C ~ 125°C
• Internal Switch(s): Yes
• Efficiency: 92%
• Led Driver Application: Lighting
• No. Of Outputs: 1
• Output Current: 20A
• Output Voltage: 40V
• Input Voltage: 6V To 36V
• Dimming Control Type: PWM
• Operating Temperature Range: -40°C To +125°C
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Output: -
• Current - Output / Channel: -

LT3743
APPLICATIONS INFORMATION
Switching MOSFET Selection
When selecting switching MOSFETs, the following pa-
rameters are critical in determining the best devices for
a given application: total gate charge (Q
(R
charge (Q
(maximum V
The following guidelines provide information to make the
selection process easier.
Both of the switching MOSFETs need to have their maximum
rated drain currents greater than the maximum inductor
current. The following equation calculates the peak induc-
tor current:
where V
is the LED forward voltage drop, R
resistance of the LED, I
and f
tion, notice that the maximum drain current is temperature
dependant. Most data sheets include a table or graph of
the maximum rated drain current vs temperature.
The maximum V
the maximum input supply voltage (including transient)
for both MOSFETs. The signals driving the gates of the
switching MOSFETs have a maximum voltage of 5V with
respect to the source. During start-up and recovery con-
ditions, the gate drive signals may be as low as 3V. To
ensure that the LT3743 recovers properly, the maximum
threshold should be less than 2V. For a robust design,
select the maximum V
Power losses in the switching MOSFETs are related to
the on-resistance, R
to the gate resistance, R
and gate-to-source capacitance, Q
on-resistance is an Ohmic loss, I
dominates for input voltages less than ~15V. Power losses
to the gate capacitance dominate for voltages greater than
~12V. When operating at higher input voltages, effi ciency
14
DS(ON)
I
MAX
S
is the switching frequency. During MOSFET selec-
IN
=I
), gate to drain charge (Q
GS
is the input voltage, L is the inductance value, V
O
+
), gate resistance (R
GS
V
and V
IN
DS
• V
should be selected to be higher than
(
DS(ON)
DS
F
GS
) and drain current (maximum I
O
G
+R
2 • f
; gate-to-drain capacitance, Q
greater than 7V.
is the regulated output current
D
; the transitional loss related
S
I
O
•L • V
)
– V
G
(
2
D
), breakdown voltages
IN
GS
F
R
is the dynamic series
GD
+R
. Power loss to the
DS(ON)
), gate-to-source
G
D
), on-resistance
I
O
, and usually
)
2
D
GD
).
F
can be optimized by selecting a high side MOSFET with
higher R
side MOSFET can be approximated by:
P
where ρ
on-resistance. Using 70°C as the maximum ambient operat-
ing temperature, ρ
are the LT3743 high side gate driver output impedance,
1.3Ω and 2.3Ω respectively.
A good approach to MOSFET sizing is to select a high
side MOSFET, then select the low side MOSFET. The trade-
off between R
MOSFET is shown in the following example. V
to 4V. Comparing two N-channel MOSFETs, with a rated
V
R
Power loss for both MOSFETs is shown in Figure 4. Observe
that while the R
loss at low input voltages is equal, but four times higher
at high input voltages than the power loss for M2.
Another power loss related to switching MOSFET selection
is the power lost to driving the gates. The total gate charge,
Q
The power is lost to the internal LDO within the LT3743.
The power lost to the charging of the gates is:
where Q
high side gate charge.
P
LOSS
LOSS
DS
DS(ON)
G
V
M1: R
Q
M2: R
Q
P
, must be charged and discharged each switching cycle.
IN
LOSS_LDO
of 40V and in the same package, but with 8× different
GS
GS
5V
•I
= (ohmic loss) + (transition loss)
= 13.8nC, Q
= 4.5nC, Q
T
OUT
GLG
DS(ON)
and 4.5× different Q
DS(ON)
DS(ON)
is a temperature-dependant term of the MOSFET’s
(
V
F
is the low side gate charge and Q
+R
• Q
V
≈ (V
DS(ON)
(
IN
DS(ON)
and lower C
(
= 2.3mΩ, Q
= 18mΩ, Q
D
I
GD
GD
IN
O
T
GD
)
is roughly equal to 1.3. R
, Q
– 5V) • (Q
+Q
•I
= 3.1nC , R
of M1 is eight times lower, the power
= 14.4nC , R
2
O
G
R
GS
, Q
DS(ON)
)
GD
G
GD
G
• 2 •R
G
= 10nC,
(
. The power loss in the high
= 45.5nC,
and Q
GLG
and Q
G
•
= 3.5Ω
G
G
+ Q
T
+R
= 1Ω
GD
GS
+
GHG
:
PU
for the high side
) • f
+R
PD
PD
S
GHG
O
)
and R
)
is equal
• f
is the
S
3743fb
PU