LDS8868-002-T2 IXYS, LDS8868-002-T2 Datasheet - Page 3

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LDS8868-002-T2

Manufacturer Part Number
LDS8868-002-T2
Description
IC LED DVR WHT/CLR BCKLGT 16WQFN
Manufacturer
IXYS
Series
PowerLite™r
Type
Backlight, White LED, Color LEDr
Datasheet

Specifications of LDS8868-002-T2

Topology
Linear (LDO), Switched Capacitor (Charge Pump)
Number Of Outputs
6
Internal Driver
Yes
Type - Primary
Backlight
Type - Secondary
White LED
Frequency
1.1MHz
Voltage - Supply
2.7 V ~ 5.5 V
Mounting Type
Surface Mount
Package / Case
16-WQFN Exposed Pad, 16-DQFN
Operating Temperature
-40°C ~ 85°C
Current - Output / Channel
32mA
Internal Switch(s)
Yes
Efficiency
94%
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Output
-
Lead Free Status / Rohs Status
 Details
Other names
LDS8868-002-T2-2

Available stocks

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Quantity
Price
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Part Number:
LDS8868-002-T2
Quantity:
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LDS8868
RECOMMENDED EN/SET TIMING
For 2.7 V
REGISTER CONFIGURATION AND PROGRAMMING
Table 1. Register Address and Data
Note: *) If Global current setting register Reg2 is used, registers Reg3 – Reg5 should be empty, and vice versa If registers Reg3 – Reg5 are
used, Reg2 should be empty to prevent data interference.
Table 2. Reg1 Code
Note: If bits Bit0 – Bit2 are set to zero, the corresponding LED bank is disabled.
© 2009 IXYS Corp.
Characteristics subject to change without notice
pulses
t
t
Data
RESETDELAY
Symbol
DATADELAY
Register
0
1
2
3
4
5
t
SETUP
t
t
t
OFF
REG1
REG2
REG3
REG4
REG5
REG6
LO
HI
IN
3
0
1
1
1
1
1
5.5V, over full ambient temperature range -40 to +85ºC.
Reg1 Bit
EN/SET Delay High to ADDRESS
2
0
1
1
1
1
0
EN/SET setup from shutdown
EN/SET low time to shutdown
Address
Pulses
EN/SET program high time
EN/SET program low time
1
0
1
1
0
0
1
EN/SET Delay to DATA
1
2
3
4
5
6
0
0
1
0
1
0
1
Name
Figure 1. EN/SET One Wire Addressable Timing Diagram
Bank Enable and IMODE
pulses
Global Current Setting*
Bank C Current Setting
Bank B Current Setting
Bank A Current Setting
Data
10
11
Return to 1x mode
6
7
8
9
Description
3
1
1
1
0
0
0
Reg1 Bit
2
0
0
0
1
1
1
1
1
0
0
1
1
0
Conditions
3
0
0
1
0
1
0
1
Bits
4
6
6
6
6
1
pulses
Data
12
13
14
15
16
IMODE
Bit 3
Min
500
0.2
0.2
1.5
10
2
3
0
0
0
0
0
Reg1 Bit
2
1
0
0
0
0
See Table 3 for values
Bit 2
1
0
1
1
0
0
ENC
DATA pattern
Typ
0
0
1
0
1
0
Doc. No. 8868_DS, Rev. N2.1
Bit 1
ENB
Max
100
100
100
RTRN
Units
Bit 0
ENA
ms
ms
μ s
μ s
μ s
μ s

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