LDS8868-002-T2 IXYS, LDS8868-002-T2 Datasheet - Page 10

no-image

LDS8868-002-T2

Manufacturer Part Number
LDS8868-002-T2
Description
IC LED DVR WHT/CLR BCKLGT 16WQFN
Manufacturer
IXYS
Series
PowerLite™r
Type
Backlight, White LED, Color LEDr
Datasheet

Specifications of LDS8868-002-T2

Topology
Linear (LDO), Switched Capacitor (Charge Pump)
Number Of Outputs
6
Internal Driver
Yes
Type - Primary
Backlight
Type - Secondary
White LED
Frequency
1.1MHz
Voltage - Supply
2.7 V ~ 5.5 V
Mounting Type
Surface Mount
Package / Case
16-WQFN Exposed Pad, 16-DQFN
Operating Temperature
-40°C ~ 85°C
Current - Output / Channel
32mA
Internal Switch(s)
Yes
Efficiency
94%
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Output
-
Lead Free Status / Rohs Status
 Details
Other names
LDS8868-002-T2-2

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LDS8868-002-T2
Quantity:
2 000
LDS8868
control input. By pulsing this signal according to a
specific protocol, a set of internal registers can be
addressed and written into allowing to configure each
bank of LEDs with the desired current. There are six
registers: the first five are 4 bits long and the sixth is
1 bit long. The registers are programmed by first
selecting the register address and then programming
data into that register.
An internal counter records the number of falling
edges to identify the address and data. The address
is serially programmed adhering to low and high
duration time delays. One down pulse corresponds to
register
correspond to register 2 being selected and so on up
to register 6. . t
100μ s. . Any pulse with less than 200 ns width may
be ignored.
Once the final rising edge of the address pulse is
programmed, the user must wait at least 500μ s
before programming the first data pulse. Any falling
edge after this minimum delay will be recognised as a
first data pulse.
Data in a register is reset once it is selected by the
address pulses. If a register is selected but no data is
programmed, next pulse sequence will be recognized
as data only. Do not send register address only
without following data because it may disrupt normal
device operation.
Once the final rising edge of the data pulses is
programmed, the user must wait at least 1.5ms
before
programming fails or is interrupted, the user must
wait at least 2 ms (t
edge before reprogramming can commence.
Upon EN/SET pin goes high the device automatically
starts looking for an address. If no falling edge is
detected within 100μ s, then the user must wait at
least 2 ms before trying to program the device again.
The device requires a minimum 10μ s delay to ensure
the initialization of the internal logic at power-up. After
this time delay, EN/SET pin may be set high and the
device registers may be programmed adhering to the
timing constraints shown in Figure 1.
Register REG1 allows to set the mode and select the
pairs of LEDs to be turned on. A low LED current
mode exists to allow for very low current operation
under 4mA per channel. If IMODE equals 1, the high
current range is selected up to 32mA. If IMODE is set
to 0, all currents are divided by 8. Each bank of LEDs
© 2009 IXYS Corp.
Characteristics subject to change without notice
1 being selected. Two down pulses
programming
LO
and t
RESETDELAY
HI
another
must be within 200ns to
) from the last rising
address.
If
10
(A, B or C) can be turned on independently by setting
the respective bit ENA, ENB, ENC to 1.
Register REG2 allows to set the same current for all
6 channels. REG3, REG4, REG5 allow to set the
current respectively in banks C, B and A. The three
banks can be programmed with independent current
values.
REG6 triggers a charge pump. This forces the charge
pump to start from 1x mode and determine the
correct mode it should be in to drive the LEDs most
efficiently. If the input voltage has risen or the device
has been reprogrammed to other LED values, it is
recommended to trigger this reset allowing the
charge pump to run in the most efficient mode.
To power-down the device and turn-off all current
sources, the EN/SET input should be low for at least
1.5ms (t
down with a delay of about 1ms. All register data are
cleared.
Unused LED Channels
For applications with only four or two LEDs, unused
LED banks can be disabled via the enable register
internally and left to float or connect to Vout.
For applications requiring 1, 3, or 5 channels, the
unused LED pins should be tied to V
3). If LED pin voltage is within 1 V of V
channel is switched off and a 250 μ A test current is
placed in the channel to sense when the channel
moves below V
Protection Modes
The LDS8868 has follow protection modes:
1. LED short to V
If LED pin is shorted to V
becomes as short circuit, or LED pin voltage is within
from V
recognizes this condition as “LED Short” and disables
this channel. If LED pin voltage is less than (Vout –
Figure 3. Application circuit with 5 LEDs
OUT
OFF
) or longer. The driver typically powers-
to (V
OUT
OUT
– 1.5 V.
OUT
protection
-
Doc. No. 8868_DS, Rev. N2.1
1.5V) range, LDS8868
OUT
, LED burned out
OUT
OUT
(see Figure
, then the

Related parts for LDS8868-002-T2