ISL6113IRZA Intersil, ISL6113IRZA Datasheet
ISL6113IRZA
Specifications of ISL6113IRZA
Related parts for ISL6113IRZA
ISL6113IRZA Summary of contents
Page 1
... CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. | 1-888-INTERSIL or 1-888-468-3774 Intersil (and design registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2007. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL6113, ISL6114 FN6457 ...
Page 2
... Ordering Information PART PART NUMBER MARKING ISL6113IRZA ISL6113 IRZ ISL6113IRZA-T* ISL6113 IRZ ISL6114IRZA ISL6114 IRZ ISL6114IRZA-T* ISL6114 IRZ ISL6113EVAL1Z ISL6113 Evaluation Platform ISL6114EVAL1Z ISL6114 Evaluation Platform *Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...
Page 3
Functional Block Diagram (1 Channel) 12VSENSE 50mV 12VIN 3VSENSE 50mV 3VIN ON/OFF 100mV* ON/OFF 100mV* VSTBY I REF CFILTER 1.25V FORCE_ON GPI BOTH A AND B SLOTS SHARE THE L/R PIN. 3 ISL6113, ISL6114 ON AUXEN VSTBY POWER-ON VSTBY RESET ...
Page 4
Pin Descriptions PIN NAME 9, 28 FORCE_ONA, Asserting a FORCE_ON input low will turn on the MAIN and AUX supplies to the respective slot in a forced mode FORCE_ONB over riding the ON input and the UV, OC and short ...
Page 5
Pin Descriptions (Continued) PIN NAME 3, 34 12VGATEA, 12VMAIN gate drive output, connects to gate of an external P-Channel MOSFET. During power-up, this pin is 12VGATEB pulled down with a 25µA (5µA for ISL6114) current to control the dv/dt ramp ...
Page 6
... Ld 7x7 QFN Package . . . . . . . . . . . Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +150°C Maximum Storage Temperature Range . . . . . . . . . -65°C to +150°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Operating Conditions 12VMAIN Supply Voltage Range +12V ± 10% 3VMAIN Supply Voltage Range .+3.3V ± 10% AUXI Supply Voltage Range . . . . . . . . . . . . . . . . . . . . .+3.3V ± 10% ...
Page 7
Electrical Specifications 12VIN = 12V, 3VIN and VSTBY = +3.3V, T PARAMETER Undervoltage Lockout Hysteresis VSTBY Power-Good Undervoltage Thresholds Power-Good Detect Hysteresis GATE DRIVE 12VGATE Voltage ISL6113 12VGATE Sink Current ISL6114 12VGATE Sink Current 12VGATE Source Current (Fault Off) (Absolute ...
Page 8
Electrical Specifications 12VIN = 12V, 3VIN and VSTBY = +3.3V, T PARAMETER I/O TIMING PARAMETERS 12V Current Limit Response Time 3.3V Current Limit Response Time VAUX Current Limit Response Time Delay from MAIN Overcurrent to FAULT output Delay from VAUX ...
Page 9
Typical Application Diagram +12V SYSTEM POWER +3.3V SUPPLY VSTBY V STBY C1 100k 100k 100k 100k FORCE_ONA FORCE_ONB GPI_A0 GPI_B0 V STBY AUXENA AUXENB ONA ONB V STBY HOT-PLUG CONTROLLER PWRGDA PWRGDB FAULTA FAULTB Float for latch / GND for ...
Page 10
ISL6113, ISL6114 Descriptions and Operational Explanation These two ICs target the dual PCI-EXPRESS slot application for add-in cards in servers. Together with a pair of N and P-Channel MOSFETs, four high precision current sense resistors and a handful of passive ...
Page 11
ISL6113, ISL6114 respectively, C LOAD capacitance, and C is the total GATE capacitance GATE including C of the external MOSFET and any external ISS capacitance connected from the GATE output pin to the GATE reference, GND or source. An ...
Page 12
FIGURE 4. ISL6113 3VMAIN START- 470µF LOAD FIGURE 5. ISL6113 12VMAIN START- 470µF LOAD FIGURE 6. ISL6113 3VMAIN START- 470µF LOAD 12 ISL6113, ISL6114 3VGATE 3 V OUT 3 IOUT CFILTER ...
Page 13
FIGURE 10. ISL6114 12VMAIN START- 470µF LOAD FIGURE 11. ISL6114 3VMAIN START- 470µF LOAD Current Regulation (CR) Function The ISL6113, ISL6114 provides a current limiting function that protects the input voltage supplies against excessive ...
Page 14
OUT 12IOUT FIGURE 14. ISL6113 12VMAIN WOC SHUTDOWN 3VGATE 3 IOUT FIGURE 15. ISL6113 3VMAIN WOC SHUTDOWN The VAUX outputs have a different circuit-breaker function. The VAUX circuit breakers do not incorporate a fast-trip detector, instead they regulate the ...
Page 15
V /nominal I FILTER where t is the desired response time with the values for FILTER I and V being found in the ISL6113, ISL6114’s FILTER FILTER “Electrical Specifications Table” on page 6. See Table 3 ...
Page 16
... The specific evaluation board as ordered and received will reflect the part number in the area below the Intersil logo either by label or silk screened lettering. For those pins not common across the ISL6112 and ISL6113, ISL6114 in the bottom left corner there is a matrix detailing the differences ...
Page 17
OUT PRSNT PGOOD t PVPERL FIGURE 18. PRSNT POWERGOOD, PERST OUT 17 ISL6113, ISL6114 GPI PERST FIGURE 19. GPI TO GPO FUNCTIONALITY 12IOUT FIGURE 20. RETRY MODE OPERATION GPO 12VMAIN 3VMAIN 12GATE September 25, 2007 FN6457.0 ...
Page 18
Typical Performance Curves 6.0 5.8 5.6 5.4 5.2 5.0 4.8 4.6 4.4 4.2 4.0 -60 -40 - TEMPERATURE (°C) FIGURE 21. ICCSTBY CURRENT vs TEMPERATURE -60 -40 - ...
Page 19
Typical Performance Curves 9.30 9.25 9.20 9.15 9.10 9.05 -60 -40 - TEMPERATURE (°C) FIGURE 27. 12VMAIN RISING POR THRESHOLD VOLTAGE vs TEMPERATURE 10.54 10.52 10.50 10.48 10.46 10.44 10.42 10.40 10.38 -60 -40 - ...
Page 20
Typical Performance Curves 120 100 -60 -40 - TEMPERATURE (°C) FIGURE 33. GATE FAULT OFF CURRENT (ABS) vs TEMPERATURE 1.30 1.28 1.26 1.24 1.22 1.20 -60 -40 - TEMPERATURE ...
Page 21
ISL6113, ISL6114 CAUTION HOT AREA CAUTION HOT AREA FIGURE 37. ISL6113EVAL1Z, ISL6114EVAL1Z BOARD PHOTOGRAPH 21 GPO_A GPO_B FN6457.0 September 25, 2007 ...
Page 22
ISL6113 ISL6114 FIGURE 38. ISL6113EVAL1Z, ISL6114EVAL1Z BOARD SCHEMATIC ...
Page 23
... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...
Page 24
Package Outline Drawing L48.7x7 48 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 4, 10/06 7.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW ( TYP ) ( TYPICAL RECOMMENDED LAND PATTERN 24 ...