LTC4300-2IMS8 Linear Technology, LTC4300-2IMS8 Datasheet - Page 9

IC BUFFER BUS HOTSWAP 2WR 8MSOP

LTC4300-2IMS8

Manufacturer Part Number
LTC4300-2IMS8
Description
IC BUFFER BUS HOTSWAP 2WR 8MSOP
Manufacturer
Linear Technology
Type
Hot-Swap Switchr
Datasheet

Specifications of LTC4300-2IMS8

Applications
General Purpose, Buffer/Bus Extender
Internal Switch(s)
Yes
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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OPERATIO
as a function of temperature and voltage for 10k pull-up
resistors and 100pF equivalent capacitance on both sides
of the part. By comparison with Figure 2, the V
curve shows that increasing the capacitance from 50pF to
150pF results in a t
output capacitances translate to longer delays (up to
150ns). Users must quantify the difference in propagation
times for a rising edge vs a falling edge in their systems
and adjust setup and hold times accordingly.
Rise-Time Accelerators
Once connection has been established, rise-time accelera-
tor circuits on all four SDA and SCL pins are activated.
These allow the user to choose weaker DC pull-up currents
on the bus, reducing power consumption while still meet-
ing system rise-time requirements. During positive bus
transitions, the LTC4300 switches in 2mA of current to
quickly slew the SDA and SCL lines once their DC voltages
exceed 0.6V. Using a general rule of 20pF of capacitance
for every device on the bus (10pF for the device and 10pF
for interconnect), choose a pull-up current so that the bus
will rise on its own at a rate of at least 1.25V/ s to
guarantee activation of the accelerators.
For example, assume an SMBus system with V
10k pull-up resistor and equivalent bus capacitance of
200pF. The rise-time of an SMBus system is calculated
from (V
2.25V. It takes an RC circuit 0.92 time constants to
traverse this voltage for a 3V supply; in this case, 0.92 •
(10k • 200pF) = 1.85 s. Thus, the system exceeds the
maximum allowed rise-time of 1 s by 85%. However,
using the rise-time accelerators, which are activated at a
OUTPUT
IL(MAX)
SIDE
50pF
Figure 1. Input–Output Connection t
– 0.15V) to (V
U
PHL
increase from 55ns to 75ns. Larger
IH(MIN)
+ 0.15V), or 0.65V to
PLH
INPUT
SIDE
150pF
CC
CC
= 3V, a
= 3.3V
DC threshold of below 0.65V, the worst-case rise-time is:
(2.25V – 0.65V) • 200pF/1mA = 320ns, which meets the
1 s rise-time requirement.
READY Digital Output (LTC4300-1)
This pin provides a digital flag which is low when either
ENABLE is low or the start-up sequence described earlier
in this section has not been completed. READY goes high
when ENABLE is high and start-up is complete. The pin is
driven by an open drain pull-down capable of sinking 3mA
while holding 0.4V on the pin. Connect a resistor of 10k to
V
LTC4300-1 only.
ENABLE Low Current Disable (LTC4300-1)
Grounding the ENABLE pin disconnects the backplane
side from the card side, disables the rise-time accelera-
tors, drives READY low, disables the bus precharge cir-
cuitry and puts the part in a near-zero current state. When
the pin voltage is driven all the way to V
for data transactions on both the backplane and card sides
to be complete (as described in the Start-Up section)
before reconnecting the two sides. This feature is available
for the LTC4300-1 only.
ACC Boost Current Enable (LTC4300-2)
Users having lightly loaded systems may wish to disable
the rise-time accelerators. Driving this pin to ground turns
off the rise-time accelerators on all four SDA and SCL pins.
Driving this pin to the V
tion of the rise-time accelerators, as described in the Rise-
Time Accelerators section above. This feature is available
for the LTC4300-2 only.
CC
to provide the pull-up. This feature is available for the
INPUT
150pF
SIDE
Figure 2. Input–Output Connection t
LTC4300-1/LTC4300-2
CC2
voltage enables normal opera-
CC
, the part waits
PHL
OUTPUT
SIDE
50pF
sn430012 430012fs
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