LT4220CGN#PBF Linear Technology, LT4220CGN#PBF Datasheet
LT4220CGN#PBF
Specifications of LT4220CGN#PBF
Available stocks
Related parts for LT4220CGN#PBF
LT4220CGN#PBF Summary of contents
Page 1
... A power good signal indicates when the output voltages monitored by the two FB comparators are within tolerance, and the gate drive signals are at their full on voltage. The LT4220 is available in a 16-lead narrow SSOP package. , LTC and LT are registered trademarks of Linear Technology Corporation. Hot Swap is a trademark of Linear Technology Corporation ...
Page 2
LT4220 ABSOLUTE MAXIMUM (Notes GND ............................................................. 22V GND ........................................................... –22V EE TRACK, TIMER .............................. – 0. ................................. V EE – – ...
Page 3
DC ELECTRICAL CHARACTERISTICS temperature range, otherwise specifications are at T SYMBOL PARAMETER + I FB Input Current INFB + – Input Current INFB – PWRGD Threshold Line Regulation – FB PWRGD Threshold ...
Page 4
LT4220 AC ELECTRICAL CHARACTERISTICS temperature range, otherwise specifications are at T SYMBOL PARAMETER + + t ON Low to GATE Low PHLON + + + t ON High to GATE High PLHON + + t FB Low to PWRGD Low ...
Page 5
W U TYPICAL PERFOR A CE CHARACTERISTICS + GATE Drive – –2. (V) ...
Page 6
LT4220 W U TYPICAL PERFOR A CE CHARACTERISTICS + + FB and ON Threshold Voltage vs Temperature 1.241 1.240 1.239 1.238 1.237 1.236 1.235 –40 – TEMPERATURE ( C) 4220 G13 6 – – FB ...
Page 7
CTIO S V (Pin 1): Negative Supply. The negative supply input EE ranges from –2.7V to –16.5V for normal operation. I typically –1.6mA. An internal undervoltage lockout circuit disables the device for inputs greater than ...
Page 8
LT4220 CTIO S + FAULT pin to the ON pin, otherwise the part remains latched off. To disable the timeout circuit breaker, connect the TIMER pin to GND. GND (Pin 9): Supply Ground Pin. PWRGD ...
Page 9
W BLOCK DIAGRA + – 1.24V + – 0.5V + 1.24V + ON – 12 – – –1.24V V + 1.24V + FB – GATE GOOD – – –1.24V N GATE GOOD ...
Page 10
LT4220 DIAGRA PLHON + t + 0.5V GATE Figure 1. ON -to-GATE 0V – ON –1V – t PLHON V – GATE V + 1.2V EE ...
Page 11
U U APPLICATIO S I FOR ATIO live insertion. Resistive dividers R1, R2 and R3, R4 pro- vide undervoltage sensing. Resistor dividers R9, R10 and R11, R12 provide a power good signal and control output voltage tracking when TRACK is ...
Page 12
LT4220 U U APPLICATIO S I FOR ATIO Whenever the output voltages reach their final value as sensed by R9, R10 and R11, R12 and both gate signals are fully on, the PWRGD pin will go high impedance. A typical ...
Page 13
U U APPLICATIO S I FOR ATIO Current Limit/Electronic Circuit Breaker The LT4220 features foldback current limit with an elec- tronic circuit breaker that protects against short-circuits or excessive supply currents. The current limit is set by placing sense resistors ...
Page 14
LT4220 U U APPLICATIO S I FOR ATIO Supply Tracking If the TRACK pin (Pin 7) is high the supply power-up tracking mode is enabled. This feature forces both sup- plies to reach their final value at the same time, ...
Page 15
... FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. ...
Page 16
... Active Inrush Limiting, Fast Comparator 1.7V to 16.5V, Active Inrush Limiting, Fast Comparator STAGGERED BACKPLANE PCB EDGE CONNECTOR CONNECTOR V + OUT RPG 5.1k + CL1 GND ESD CONTROL + CL2 V OUT – 4220 F09 LT/TP 0403 2K • PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 2003 4220f ...