ADE7753ARS Analog Devices Inc, ADE7753ARS Datasheet - Page 24
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ADE7753ARS
Manufacturer Part Number
ADE7753ARS
Description
IC ENERGY METERING DETEC 20-SSOP
Manufacturer
Analog Devices Inc
Specifications of ADE7753ARS
Rohs Status
RoHS non-compliant
Input Impedance
390 KOhm
Measurement Error
0.1%
Voltage - I/o High
2.4V
Voltage - I/o Low
0.8V
Current - Supply
3mA
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-SSOP (0.200", 5.30mm Width)
Meter Type
Single Phase
For Use With
EVAL-ADE7753ZEB - BOARD EVALUATION AD7753
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADE7753ARS
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
ADE7753ARSZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
ADE7753ARSZRL
Manufacturer:
ADI/亚德诺
Quantity:
20 000
ADE7753
The Apparent Power (AP) is defined as V
expression is independent from the phase angle between the
current and the voltage.
Figure 43 illustrates graphically the signal processing in each
phase for the calculation of the Apparent Power in the
ADE7753.
The gain of the Apparent Energy can be adjusted by using the
multiplier and VA Gain register (VAGAIN[11:0]). The gain
is adjusted by writing a 2’s complement, 12-bit word to the
VAGAIN register. Below is the expression that shows how
the gain adjustment is related to the contents of the VA Gain
register.
For example when 7FFh is written to the VA Gain register
the Power output is scaled up by 50%. 7FFh = 2047d,
2047/2
Complement) and power output is scaled by –50%.
The Apparent Power is calculated with the Current and
Voltage RMS values obtained in the RMS blocks of the
ADE7753. Shown in Figure 44 is the maximum code
(Hexadecimal) output range of the Apparent Power signal.
Note that the output range changes depending on the contents
of the Apparent Power Gain registers. The minimum output
range is given when the Apparent Power Gain register
content is equal to 800h and the maximum range is given by
v
p
p
Output
t i
(
(
(
(
t
t
t
)
V rms
)
)
)
I rms
17D338h
1C82B3h
V
v
00h
00h
VAGAIN
12
Figure 43 - Apparent Power Signal Processing
Voltage RMS Signal - v(t)
Current RMS Signal - i(t)
2
(
rm s
2
Reactive
t
Power
= 0.5. Similarly, 800h = -2047 Dec (signed 2’s
I
)
rms
V
I
rms
rm s
sin
t i
(
sin
cos(
)
Figure 42 - Power triangle
Apparent
MULTIPLIER
t
t
)
V
rm s
Power
PRELIMINARY TECHNICAL DATA
I
rm s
cos(
Active
Power
1
VAGAIN
2
VAGAIN
t
2
Apparent
12
AD055h
Power
rms
)
Apparent Power
Signal - P
x I
rms
. This
(19)
(20)
–24–
writing 7FFh to the Apparent Power Gain register. This can
be used to calibrate the Apparent Power (or Energy) calcu-
lation in the ADE7753 -see Apparent Power calculation.
Apparent Power Offset Calibration
Each RMS measurement includes an offset compensation
register to calibrate and eliminate the DC component in the
RMS value -see Channel 1 RMS calculation and Channel 2 RMS
calculation. The channel 1 and channel 2 RMS values are then
multiplied together in the Apparent Power signal processing.
As no additional offsets are created in the multiplication of
the RMS values, there is no specific offset compensation in
the Apparent Power signal processing. The offset compensa-
tion of the Apparent Power measurement is done by calibrating
each individual RMS measurements.
APPARENT ENERGY CALCULATION
The Apparent Energy is given as the integral of the Apparent
Power.
The ADE7753 achieves the integration of the Apparent
Power signal by continuously accumulating the Apparent
Power signal in an internal 48-bit register. The Apparent
Energy register (VAENERGY[23:0]) represents the upper
24 bits of this internal register. This discrete time accumu-
lation or summation is equivalent to integration in continuous
time. Equation 23 below expresses the relationship
Where n is the discrete time sample number and T is the
sample period.
The discrete time sample period (T) for the accumulation
register in the ADE7753 is 1.1µs (4/CLKIN).
Figure 44 shows a graphical representation of this discrete
time integration or accumulation. The Apparent Power
signal is continuously added to the internal register. This
addition is a signed addition even if the Apparent Energy
remains theoretically always positive.
Apparent
Apparent
Figure 44- Apparent Power Calculation Output range
Apparent Power 100% FS
Voltage and Current channel inputs: 0.5V / GAIN
103880h
AD055h
5682Bh
00000h
Energy
Energy
000h
Apparent Power
Calibration Range
Apparent Power 150% FS
VAGAIN[11:0]
7FFh
Lim
T
Apparent
0
n
0
800h
Apparent
Apparent Power 50% FS
Power
Power
(
t
)
REV. PrF 10/02
dt
(
nT
)
T
(21)
(22)