ADE7753ARS Analog Devices Inc, ADE7753ARS Datasheet - Page 16

• Manufacturer Part Number: ADE7753ARS
• Description: IC ENERGY METERING DETEC 20-SSOP
• Manufacturer: Analog Devices Inc

Specifications of ADE7753ARS

• Rohs Status: RoHS non-compliant
• Input Impedance: 390 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 2.4V
• Voltage - I/o Low: 0.8V
• Current - Supply: 3mA
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SSOP (0.200", 5.30mm Width)
• Meter Type: Single Phase
• For Use With: EVAL-ADE7753ZEB - BOARD EVALUATION AD7753

ADE7753
The contents of the offset correction registers are 6-bit, sign and
magnitude coded. The weight of the LSB depends on the gain
setting, i.e., 1, 2, 4, 8, or 16. Table 6 shows the correctable offset
span for each of the gain settings and the LSB weight (mV) for
the offset correction registers. The maximum value that can be
written to the offset correction registers is ±31d—see Figure 34.
Figure 34 shows the relationship between the offset correction
register contents and the offset (mV) on the analog inputs for a
gain setting of 1. In order to perform an offset adjustment, the
analog inputs should be first connected to AGND, and there
should be no signal on either Channel 1 or Channel 2. A read
from Channel 1 or Channel 2 using the waveform register
indicates the offset in the channel. This offset can be canceled
by writing an equal and opposite offset value to the Channel 1
offset register, or an equal value to the Channel 2 offset register.
The offset correction can be confirmed by performing another
read. Note when adjusting the offset of Channel 1, one should
disable the digital integrator and the HPF.
Table 6. Offset Correction Range—Channels 1 and 2
Gain
1
2
4
8
16
The current and voltage rms offsets can be adjusted with the
IRMSOS and VRMSOS registers—see Channel 1 RMS Offset
Compensation and Channel 2 RMS Offset Compensation
sections.
Figure 33. Effect of Channel Offsets on the Real Power Calculation
Correctable Span
±50 mV
±37 mV
±30 mV
±26 mV
±24 mV
Figure 34. Channel 1 Offset Correction Range (Gain = 1)
V
OS
V × I
× I
2
OS
0
–50mV
DC COMPONENT (INCLUDING ERROR TERM)
IS EXTRACTED BY THE LPF FOR REAL
POWER CALCULATION
ω
FREQUENCY (RAD/S)
0x1F
CH1OS[5:0]
0x00
0x3F
I
V
OS
OS
× V
× I
0mV
01,1111b
11,1111b
2ω
+50mV
LSB Size
1.61 mV/LSB
1.19 mV/LSB
0.97 mV/LSB
0.84 mV/LSB
0.77 mV/LSB
OFFSET
ADJUST
SIGN + 5 BITS
SIGN + 5 BITS
02875-0-034
02875-0-033
Rev. A | Page 16 of 60
di/dt CURRENT SENSOR AND
DIGITAL INTEGRATOR
A di/dt sensor detects changes in magnetic field caused by ac
current. Figure 35 shows the principle of a di/dt current sensor.
The flux density of a magnetic field induced by a current is
directly proportional to the magnitude of the current. The
changes in the magnetic flux density passing through a
conductor loop generate an electromotive force (EMF) between
the two ends of the loop. The EMF is a voltage signal, which is
proportional to the di/dt of the current. The voltage output
from the di/dt current sensor is determined by the mutual
inductance between the current-carrying conductor and the
di/dt sensor. The current signal needs to be recovered from the
di/dt signal before it can be used. An integrator is therefore
necessary to restore the signal to its original form. The ADE7753
has a built-in digital integrator to recover the current signal
from the di/dt sensor. The digital integrator on Channel 1 is
switched off by default when the ADE7753 is powered up.
Setting the MSB of CH1OS register turns on the integrator.
Figure 36 to Figure 39 show the magnitude and phase response
of the digital integrator.
–10
–20
–30
–40
–50
10
0
Figure 35. Principle of a di/dt Current Sensor
Digital Integrator and Phase Compensator
Figure 36. Combined Gain Response of the
10
2
MAGNETIC FIELD CREATED BY CURRENT
(DIRECTLY PROPORTIONAL TO CURRENT)
FREQUENCY (Hz)
+ EMF (ELECTROMOTIVE FORCE)
– INDUCED BY CHANGES IN
MAGNETIC FLUX DENSITY (di/dt)
10
3
02875-0-036
02875-0-035