ADE7763ARSZRL Analog Devices Inc, ADE7763ARSZRL Datasheet - Page 47
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ADE7763ARSZRL
Manufacturer Part Number
ADE7763ARSZRL
Description
IC ENERGY METERING 1PHASE 20SSOP
Manufacturer
Analog Devices Inc
Datasheet
1.ADE7763ARSZRL.pdf
(56 pages)
Specifications of ADE7763ARSZRL
Input Impedance
390 KOhm
Measurement Error
0.1%
Voltage - I/o High
2.4V
Voltage - I/o Low
0.8V
Current - Supply
3mA
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-SSOP (0.200", 5.30mm Width)
Meter Type
Single Phase
Ic Function
Single-Phase Active And Apparent Energy Metering IC
Supply Voltage Range
4.75V To 5.25V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
SSOP
No. Of Pins
20
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-ADE7763ZEB - BOARD EVALUATION FOR ADE7763
Lead Free Status / Rohs Status
Compliant
Other names
ADE7763ARSZRL
ADE7763ARSZRLTR
ADE7763ARSZRLTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADE7763ARSZRL
Manufacturer:
ADI/亚德诺
Quantity:
20 000
REGISTERS
Table 9. Summary of Registers by Address
Address
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
0x10
Name
WAVEFORM
AENERGY
RAENERGY
LAENERGY
VAENERGY
RVAENERGY
LVAENERGY
RESERVED
MODE
IRQEN
STATUS
RSTSTATUS
CH1OS
CH2OS
GAIN
PHCAL
R/W
R
R
R
R
R
R
R
R/W
R/W
R
R
R/W
R/W
R/W
R/W
No. Bits
24
24
24
24
24
24
24
16
16
16
16
8
8
8
6
Default
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x000C
0x40
0x0
0x0
0x00
0x0
0x0
0x0D
Type
S
S
S
S
U
U
U
U
U
U
U
S
S
U
S
*
*
Rev. B | Page 47 of 56
1
Waveform Register. This read-only register contains the sampled
Active Energy Register. Active power is accumulated (integrated) over
Same as the active energy register, except that the register is reset to 0
Line Accumulation Active Energy Register. The instantaneous active
Apparent Energy Register. Apparent power is accumulated over time in
Same as the VAENERGY register, except that the register is reset to 0
Line Accumulation Apparent Energy Register. The instantaneous real
Mode Register. This is a 16-bit register through which most of the
Interrupt Enable Register. ADE7763 interrupts can be deactivated at any
Interrupt Status Register. This is a 16-bit read-only register that contains
Phase Calibration Register. The phase relationship between Channel 1
Description
waveform data from either Channel 1, Channel 2, or the active power
signal. The data source and the length of the waveform registers are
selected by Bits 14 and 13 in the mode register—see the Channel 1
Sampling and Channel 2 Sampling sections.
time in this 24-bit, read-only register—see the Energy Calculation
section.
following a read operation.
power is accumulated in this read-only register over the LINECYC number
of half line cycles.
this read-only register.
following a read operation.
power is accumulated in this read-only register over the LINECYC number
of half line cycles.
ADE7763’s functionality is accessed. Signal sample rates, filter enabling,
and calibration modes are selected by writing to this register. The
contents can be read at any time—see the Mode Register (0X09) section.
time by setting the corresponding bit in this 16-bit enable register to
Logic 0. The status register continues to detect an interrupt event even if
disabled; however, the IRQ output is not activated—see the
section.
information regarding the source of ADE7763 interrupts—see the
Interrupts section.
Same as the interrupt status register, except that the register contents are
reset to 0 (all flags cleared) after a read operation.
Channel 1 Offset Adjust. Bit 6 is not used. Writing to Bits 0 to 5 allows
offsets on Channel 1 to be removed—see the Analog Inputs and CH1OS
Register sections. Writing Logic 1 to the MSB of this register enables the
digital integrator on Channel 1; writing Logic 0 disables the integrator.
The default value of this bit is 0.
Channel 2 Offset Adjust. Bits 6 and 7 are not used. Writing to Bits 0 to 5 of
this register allows offsets on Channel 2 to be removed—see the Analog
Inputs section. Note that the CH2OS register is inverted. To apply a
positive offset, a negative number is written to this register.
PGA Gain Adjust. This 8-bit register is used to adjust the gain selection for
the PGA in Channels 1 and 2—see the Analog Inputs section.
and 2 can be adjusted by writing to this 6-bit register. The valid content
of this twos complement register is between 0x1D to 0x21. At the line
frequency of 60 Hz, this ranges from –2.06° to +0.7°—see the Phase
Compensation section.
ADE7763
Interrupts