ADE7758ARWZ Analog Devices Inc, ADE7758ARWZ Datasheet - Page 68

• Manufacturer Part Number: ADE7758ARWZ
• Description: IC ENERGY METERING 3PHASE 24SOIC
• Manufacturer: Analog Devices Inc

Specifications of ADE7758ARWZ

• Input Impedance: 380 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 2.4V
• Voltage - I/o Low: 0.8V
• Current - Supply: 8mA
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (0.300", 7.50mm Width)
• Meter Type: 3 Phase
• Ic Function: Poly Phase Multifunction Energy Metering IC
• Supply Voltage Range: 4.75V To 5.25V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: SOIC
• No. Of Pins: 24
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADE7758
INTERRUPT MASK REGISTER (0x18)
When an interrupt event occurs in the ADE7758, the IRQ logic output goes active low if the mask bit for this event is Logic 1 in the
MASK register. The IRQ logic output is reset to its default collector open state when the RSTATUS register is read.
function of each bit in the interrupt mask register.
Table 23. Function of Each Bit in the Interrupt Mask Register
Bit
Location
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
Interrupt
Flag
AEHF
REHF
VAEHF
SAGA
SAGB
SAGC
ZXTOA
ZXTOB
ZXTOC
ZXA
ZXB
ZXC
LENERGY
RESERVED
PKV
PKI
WFSM
REVPAP
REVPRP
SEQERR
Default
Value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Description
Enables an interrupt when there is a change in Bit 14 of any one of the three WATTHR registers,
that is, the WATTHR register is half full.
Enables an interrupt when there is a change in Bit 14 of any one of the three VARHR registers,
that is, the VARHR register is half full.
Enables an interrupt when there is a 0 to 1 transition in the MSB of any one of the three VAHR
registers, that is, the VAHR register is half full.
Enables an interrupt when there is a SAG on the line voltage of the Phase A.
Enables an interrupt when there is a SAG on the line voltage of the Phase B.
Enables an interrupt when there is a SAG on the line voltage of the Phase C.
Enables an interrupt when there is a zero-crossing timeout detection on Phase A.
Enables an interrupt when there is a zero-crossing timeout detection on Phase B.
Enables an interrupt when there is a zero-crossing timeout detection on Phase C.
Enables an interrupt when there is a zero crossing in the voltage channel of Phase A (see the
Zero-Crossing Detection section).
Enables an interrupt when there is a zero crossing in the voltage channel of Phase B (see the
Zero-Crossing Detection section).
Enables an interrupt when there is a zero crossing in the voltage channel of Phase C (see the
Zero-Crossing Detection section).
Enables an interrupt when the energy accumulations over LINECYC are finished.
Reserved.
Enables an interrupt when the voltage input selected in the MMODE register is above the value
in the VPINTLVL register.
Enables an interrupt when the current input selected in the MMODE register is above the value
in the IPINTLVL register.
Enables an interrupt when data is present in the WAVEMODE register.
Enables an interrupt when there is a sign change in the watt calculation among any one of the
phases specified by the TERMSEL bits in the COMPMODE register.
Enables an interrupt when there is a sign change in the VAR calculation among any one of the
phases specified by the TERMSEL bits in the COMPMODE register.
Enables an interrupt when the zero crossing from Phase A is followed not by the zero crossing
of Phase C but with that of Phase B.
Rev. D | Page 68 of 72
Table 23
describes the